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path: root/src/mainboard/intel
AgeCommit message (Expand)Author
2020-11-08mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik
2020-11-07mb/intel/adlrvp: Configure GPIOs to enable DMICSridhar Siricilla
2020-11-07mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla
2020-11-07mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllersV Sowmya
2020-11-07mb/intel/adlrvp: Configure the HPD GPIO'sV Sowmya
2020-11-05mb/intel/adlrvp: Add support for DDR5 memorySubrata Banik
2020-11-04mb/intel/baskingridge: Convert to ASL 2.0 syntaxElyes HAOUAS
2020-11-04mb/intel/emeraldlake2: Convert to ASL 2.0 syntaxElyes HAOUAS
2020-11-03soc/intel/broadwell: Relocate PCH ACPI filesAngel Pons
2020-11-02mb, soc/intel: Reorganize CNVi device entries in devicetreeFurquan Shaikh
2020-10-30tigerlake mainboards: switch to devtree aliases for PMC MUX connectorsTim Wawrzynczak
2020-10-30soc/intel/broadwell: Separate PCH in devicetreeAngel Pons
2020-10-30mb/intel/wtm2: Prepare devicetree for PCH splitAngel Pons
2020-10-29mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik
2020-10-26mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner
2020-10-21soc/intel,mb/*: get rid of legacy pad macrosMichael Niewöhner
2020-10-19superio/nuvoton: Factor out equivalent Kconfig optionAngel Pons
2020-10-16mb/intel/adlrvp: Enable Hybrid storage modeSubrata Banik
2020-10-16mb/intel/adlrvp: Enable PCIE RP11 for optaneSubrata Banik
2020-10-16mb/intel/adlrvp: Fix SSD detection issue on ADL RVPSubrata Banik
2020-10-16mb/intel/adlrvp: Program GPIO for M.2 PCH SSDSubrata Banik
2020-10-14mb/intel/adlrvp: Add ADL-P mainboard ASL codeSubrata Banik
2020-10-14mb/intel/adlrvp: Add ADL-P ramstage mainboard codeSubrata Banik
2020-10-14mb/intel/tglrvp: Enable Pcie WWAN m.2Bora Guvendik
2020-10-13{src/mb,util/autoport}: Use macro for DSDT revisionElyes HAOUAS
2020-10-13mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devicesFurquan Shaikh
2020-10-13mb/intel/adlrvp/dsdt.asl: Use macro for DSDT revisionElyes HAOUAS
2020-10-13mb/intel/latest mainboards: Get rid of power button device in corebootSubrata Banik
2020-10-12mb/intel/d945gclf/acpi: Convert platform.asl to ASL 2.0 syntaxElyes HAOUAS
2020-10-12mb/intel: Convert to ASL 2.0 syntaxElyes HAOUAS
2020-10-12mb/intel/tglrvp: Enable early EC syncAnil Kumar
2020-10-12mb/intel/tglrvp: Add support of TPM over SPIShaunak Saha
2020-10-11mb/intel/adlrvp: Add ADL-P romstage mainboard codeSubrata Banik
2020-10-08mb/intel/adlrvp: Add initial ADL-P mainboard codeSubrata Banik
2020-10-08mb/intel/{jslrvp,tglrvp}: Remove non-existent 'subdirs-y += ../common'Subrata Banik
2020-10-05soc/intel/common/block/acpi: Factor out common platform.aslSubrata Banik
2020-10-05mb/{google,intel}/{volteer,tglrvp}: Refer to common IPU ASLSubrata Banik
2020-10-03soc/intel/xeon_sp: Use common ASL code for xeon_spMarc Jones
2020-10-01mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays...Jason Le
2020-09-29mb/intel/jslrvp: Update PMC as hidden deviceMaulik V Vaghela
2020-09-28mb/intel/tglrvp: Add DTT support for tglrvpSumeet R Pawnikar
2020-09-23mb/intel/tglrvp: Enable Intel Speed Shift Technology for Tigerlake RVPShreesh Chhabbi
2020-09-23treewide: rename GENERIC_SPD_BIN to HAVE_SPD_BIN_IN_CBFSMichael Niewöhner
2020-09-22mb/*: drop GENERIC_SPD_BIN from boards without soldered memoryMichael Niewöhner
2020-09-22soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFNSumeet R Pawnikar
2020-09-21mb/intel/tglrvp: Enable CSE Firmware Lite SKUJamie Ryu
2020-09-21mb/intel: Drop unneeded empty linesElyes HAOUAS
2020-09-21mb/intel/tglrvp: Enable HECI interfaceJamie Ryu
2020-09-19apollolake boards: Enable CSE in devicetreeSubrata Banik
2020-09-17nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons
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