summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
AgeCommit message (Expand)Author
2012-07-24ChromeOS: Remove board specific acpi_get_vdat_info()Stefan Reinauer
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Remove CMOS Extended range enable from romstageDuncan Laurie
2012-07-24Move GGL0001 ACPI code to generic ChromeOS codeStefan Reinauer
2012-05-26Move subsystem IDs to devicetree.cbStefan Reinauer
2012-05-08Clean up #ifsPatrick Georgi
2012-05-03Don't pre-enable SATA AHCI in romstage.cStefan Reinauer
2012-05-02ChromeOS: drop unused debug header descriptionStefan Reinauer
2012-05-01Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boardsStefan Reinauer
2012-05-01Clean up Emerald Lake 2 mainboard directoryGabe Black
2012-05-01Allow more CPU cores on Emerald Lake 2 CRBStefan Reinauer
2012-05-01Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2.Gabe Black
2012-05-01Fix Sandybridge/Ivybridge mainboards according to code reviewStefan Reinauer
2012-05-01Set up the Emerald Lake 2 SMI and SCI sources based on the schematic.Gabe Black
2012-04-30Add support for Intel Emerald Lake 2 CRBStefan Reinauer
2012-04-27Move top level pc80 directory to drivers/Stefan Reinauer
2012-04-20Refactor some alignment handlingPatrick Georgi
2012-04-15cmos.layout: Remove invalid warningVikram Narayanan
2012-03-16Intel northbridge I945: Apply un-written naming rulesKyösti Mälkki
2012-03-08Unify Local APIC address definitionsPatrick Georgi
2012-02-24Ati video: Apply un-written naming rulesKyösti Mälkki
2012-02-22ACPI: More ../../.. removalPatrick Georgi
2012-02-17intel/i82801cx: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-17intel/i82801ex: Move HAVE_HARD_RESET to southbridgePatrick Georgi
2012-02-10Intel cpus: apply un-written naming rulesKyösti Mälkki
2012-01-31northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig optionPeter Stuge
2011-12-02i3100: Add HAVE_HARD_RESETSven Schnelle
2011-10-30remove usbdebug.h include from mainboard/romstage codeSven Schnelle
2011-10-28Get rid of the old romstage-as-bootblock ROM layoutPatrick Georgi
2011-10-13Use default table creator macro for all SSDTsStefan Reinauer
2011-10-13mptable: Refactor mptable generation some morePatrick Georgi
2011-10-13mptable: Get rid of fixup_virtual_wirePatrick Georgi
2011-10-13mptable: Refactor lintsrc generationPatrick Georgi
2011-09-21Use ACPI text fields consistently with all other boardsStefan Reinauer
2011-08-26Add automatic SMBIOS table generationSven Schnelle
2011-06-15Remove old ACPI codeSven Schnelle
2011-06-15i82801gx: replace cafed00d/cafebabe by definesSven Schnelle
2011-06-07SMM: add defines for APM_CNT registerSven Schnelle
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
2011-04-20run uart_init() from console_init, just like the other console initialization...Stefan Reinauer
2011-04-18* Set USBDEBUG_DEFAULT_PORT in all southbridges and use that valueStefan Reinauer
2011-04-15fix mainboards that were including earlymtrr.c without actually using it.Stefan Reinauer
2011-03-01Use subsystem id from devicetree.cb instead of Kconfig and moveSven Schnelle
2011-02-21[i945] Add SPD adress mappingSven Schnelle
2010-12-16Get mptable OEM/product ID from kconfig variables.Uwe Hermann
2010-12-13Compile cbmem.c instead of including it in romstage,Rudolf Marek
2010-12-11After this has been brought up many times before, rename src/arch/i386 toStefan Reinauer
2010-12-08Move "select CACHE_AS_RAM" lines from boards into CPU socket.Uwe Hermann
2010-12-08second round name simplification. drop the <component>_ prefix.stepan
2010-12-08first round name simplification. drop the <component>_ prefix.stepan
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-22 14:56:55 +0000