coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-11-18	mb/intel/adlrvp: Update HPD1/2 GPIO as per latest schematics	Subrata Banik
2020-11-18	mb/intel/jasperlake_rvp: Modify flash layout and enable CSE RW update	V Sowmya
2020-11-17	src: Add missing 'include <console/console.h>'	Elyes HAOUAS
2020-11-13	mrc_cache: Move code for triggering memory training into mrc_cache	Shelley Chen
2020-11-13	mb/intel/adlrvp: Update WWAN GPIO as per latest schematics	Subrata Banik
2020-11-13	soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig	Michael Niewöhner
2020-11-13	broadwell: Flatten `acpi_init_gnvs` function	Angel Pons
2020-11-13	broadwell: Factor out `acpi_fill_madt` function	Angel Pons
2020-11-13	nb/intel/haswell/acpi: Merge `haswell.asl` into `hostbridge.asl`	Angel Pons
2020-11-13	soc/intel/broadwell/acpi: Rename `systemagent.asl`	Angel Pons
2020-11-10	sb/intel/lynxpoint/sata: Always use AHCI mode	Angel Pons
2020-11-09	mb/intel/adlrvp: Replace if-else-if ladder with switch construct	Sridhar Siricilla
2020-11-09	mb/intel/adlrvp: Add PMC.MUX.CONx device configuration for adlrvp	V Sowmya
2020-11-09	mb/intel/jasperlake_rvp: Update Power Limit2 minimum value	Sumeet R Pawnikar
2020-11-08	mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'	Subrata Banik
2020-11-07	mb/intel/adlrvp: Configure GPIOs to enable DMIC	Sridhar Siricilla
2020-11-07	mb/intel: Enable ALC711 Audio codec over SNDW0 link	Sridhar Siricilla
2020-11-07	mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllers	V Sowmya
2020-11-07	mb/intel/adlrvp: Configure the HPD GPIO's	V Sowmya
2020-11-05	mb/intel/adlrvp: Add support for DDR5 memory	Subrata Banik
2020-11-04	mb/intel/baskingridge: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-11-04	mb/intel/emeraldlake2: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-11-03	soc/intel/broadwell: Relocate PCH ACPI files	Angel Pons
2020-11-02	mb, soc/intel: Reorganize CNVi device entries in devicetree	Furquan Shaikh
2020-10-30	tigerlake mainboards: switch to devtree aliases for PMC MUX connectors	Tim Wawrzynczak
2020-10-30	soc/intel/broadwell: Separate PCH in devicetree	Angel Pons
2020-10-30	mb/intel/wtm2: Prepare devicetree for PCH split	Angel Pons
2020-10-29	mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'	Subrata Banik
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-21	soc/intel,mb/*: get rid of legacy pad macros	Michael Niewöhner
2020-10-19	superio/nuvoton: Factor out equivalent Kconfig option	Angel Pons
2020-10-16	mb/intel/adlrvp: Enable Hybrid storage mode	Subrata Banik
2020-10-16	mb/intel/adlrvp: Enable PCIE RP11 for optane	Subrata Banik
2020-10-16	mb/intel/adlrvp: Fix SSD detection issue on ADL RVP	Subrata Banik
2020-10-16	mb/intel/adlrvp: Program GPIO for M.2 PCH SSD	Subrata Banik
2020-10-14	mb/intel/adlrvp: Add ADL-P mainboard ASL code	Subrata Banik
2020-10-14	mb/intel/adlrvp: Add ADL-P ramstage mainboard code	Subrata Banik
2020-10-14	mb/intel/tglrvp: Enable Pcie WWAN m.2	Bora Guvendik
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-10-13	mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devices	Furquan Shaikh
2020-10-13	mb/intel/adlrvp/dsdt.asl: Use macro for DSDT revision	Elyes HAOUAS
2020-10-13	mb/intel/latest mainboards: Get rid of power button device in coreboot	Subrata Banik
2020-10-12	mb/intel/d945gclf/acpi: Convert platform.asl to ASL 2.0 syntax	Elyes HAOUAS
2020-10-12	mb/intel: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-10-12	mb/intel/tglrvp: Enable early EC sync	Anil Kumar
2020-10-12	mb/intel/tglrvp: Add support of TPM over SPI	Shaunak Saha
2020-10-11	mb/intel/adlrvp: Add ADL-P romstage mainboard code	Subrata Banik
2020-10-08	mb/intel/adlrvp: Add initial ADL-P mainboard code	Subrata Banik
2020-10-08	mb/intel/{jslrvp,tglrvp}: Remove non-existent 'subdirs-y += ../common'	Subrata Banik
2020-10-05	soc/intel/common/block/acpi: Factor out common platform.asl	Subrata Banik