coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-09-15	intel/amenia: Remove setting of GPIO_TIER1_SCI enable bit	Shaunak Saha
2016-09-15	kunimitsu: Add FSP 2.0 support in romstage	Rizwan Qureshi
2016-09-14	mainboard/intel/amenia: Configure PERST_0 pin	Vaibhav Shankar
2016-09-14	mainboards/apollolake: Set RAPL power limit PL1 value to 12W.	Sumeet Pawnikar
2016-09-12	kunimitsu: Add initial FSP2.0 support	Rizwan Qureshi
2016-09-07	mb/intel/d945gclf: Disable combined mode to fix SATA	Arthur Heymans
2016-09-05	intel/minnowmax: Clean up whitespace	Marshall Dawson
2016-09-04	intel/minnowmax: Enable all PCIe ports	Marshall Dawson
2016-09-04	intel/minnowmax: Program GPIO for power LED	Marshall Dawson
2016-09-02	drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box	Brandon Breitenstein
2016-08-31	i945: Enable changing VRAM size	Arthur Heymans
2016-08-31	mainboard/*/Kconfig: Set GBB_HWID where missing	Patrick Georgi
2016-08-25	vboot: consolidate google_chromeec_early_init() calls	Aaron Durbin
2016-08-18	Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS	Aaron Durbin
2016-08-18	intel/amenia: Update eMMC DLL settings	Bora Guvendik
2016-08-17	mainboard: Clean up boot_option/reboot_bits in cmos.layout	Nico Huber
2016-08-14	src/mainboard: Capitalize ROM, RAM, CPU and APIC	Elyes HAOUAS
2016-08-11	intel/amenia: Add MAINBOARD_FAMILY for amenia	Bora Guvendik
2016-08-11	intel/amenia: set default value for BOOT_MEDIA_SPI_BUS	Bora Guvendik
2016-08-11	intel/amenia: Select UART_FOR_CONSOLE for amenia	Bora Guvendik
2016-08-11	intel/amenia: Update flash size to 16MB	Bora Guvendik
2016-08-08	skylake/devicetree: Add PIRQ Routing programming	Barnali Sarkar
2016-08-05	soc/intel/quark: Add FSP 2.0 romstage support	Lee Leahy
2016-08-05	soc/intel/quark: Add FSP 2.0 boot block support	Lee Leahy
2016-08-04	chromeec: Chrome EC firmware source selection for EC and PD firmwares	Paul Kocialkowski
2016-08-03	mainboard/intel/galileo: Add FSP 2.0 Kconfig support	Lee Leahy
2016-08-03	mainboard/intel/galileo: Remove use of EDK-II macros & data types	Lee Leahy
2016-08-02	google/lars & intel/kunimitsu: Disable EC build	Martin Roth
2016-08-02	intel/amenia: Add GPIO changes to assert SLP_S0/Reset signal	Shankar, Vaibhav
2016-08-01	Add newlines at the end of all coreboot files	Martin Roth
2016-07-31	intel/amenia: Enable DPTF in mainboard	Shaunak Saha
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-07-31	intel/wifi: Include conditionally in the build	Kyösti Mälkki
2016-07-30	chromeos mainboards: remove chromeos.asl	Aaron Durbin
2016-07-28	skylake/devicetree: Add LPC EC decode range	Subrata Banik
2016-07-28	skylake/mainboard: Define mainboard hook in bootblock	Subrata Banik
2016-07-28	bootmode: Get rid of CONFIG_BOOTMODE_STRAPS	Furquan Shaikh
2016-07-28	vboot: Separate vboot from chromeos	Furquan Shaikh
2016-07-25	skylake: Move CHROMEOS config to SoC	Furquan Shaikh
2016-07-25	apollolake: Move CHROMEOS config to SoC	Furquan Shaikh
2016-07-25	intel/amenia: Add chromeos.c to verstage	Furquan Shaikh
2016-07-22	intel/amenia: Write protect GPIO relative to bank offset	sselvar2
2016-07-19	intel/amenia: Add DA7219 support in acpi	Harsha Priya
2016-07-15	intel/amenia: Add wake-up from lid open	Shaunak Saha
2016-07-15	soc/intel/apollolake: Consolidate ISH enabling	Andrey Petrov
2016-07-15	mainboards/skylake: use common Chrome EC SMI helpers	Aaron Durbin
2016-07-15	mainboards/apollolake: use common Chrome EC SMI helpers	Aaron Durbin
2016-07-15	mainboards: remove direct acpi_slp_type usage	Aaron Durbin
2016-07-15	mainboards: align on using ACPI_Sx definitions	Aaron Durbin
2016-07-15	Google Mainboards: Increase RO coreboot size on flash	Daisuke Nojiri