coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-10-13	mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devices	Furquan Shaikh
2020-10-13	mb/intel/adlrvp/dsdt.asl: Use macro for DSDT revision	Elyes HAOUAS
2020-10-13	mb/intel/latest mainboards: Get rid of power button device in coreboot	Subrata Banik
2020-10-12	mb/intel/d945gclf/acpi: Convert platform.asl to ASL 2.0 syntax	Elyes HAOUAS
2020-10-12	mb/intel: Convert to ASL 2.0 syntax	Elyes HAOUAS
2020-10-12	mb/intel/tglrvp: Enable early EC sync	Anil Kumar
2020-10-12	mb/intel/tglrvp: Add support of TPM over SPI	Shaunak Saha
2020-10-11	mb/intel/adlrvp: Add ADL-P romstage mainboard code	Subrata Banik
2020-10-08	mb/intel/adlrvp: Add initial ADL-P mainboard code	Subrata Banik
2020-10-08	mb/intel/{jslrvp,tglrvp}: Remove non-existent 'subdirs-y += ../common'	Subrata Banik
2020-10-05	soc/intel/common/block/acpi: Factor out common platform.asl	Subrata Banik
2020-10-05	mb/{google,intel}/{volteer,tglrvp}: Refer to common IPU ASL	Subrata Banik
2020-10-03	soc/intel/xeon_sp: Use common ASL code for xeon_sp	Marc Jones
2020-10-01	mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays...	Jason Le
2020-09-29	mb/intel/jslrvp: Update PMC as hidden device	Maulik V Vaghela
2020-09-28	mb/intel/tglrvp: Add DTT support for tglrvp	Sumeet R Pawnikar
2020-09-23	mb/intel/tglrvp: Enable Intel Speed Shift Technology for Tigerlake RVP	Shreesh Chhabbi
2020-09-23	treewide: rename GENERIC_SPD_BIN to HAVE_SPD_BIN_IN_CBFS	Michael Niewöhner
2020-09-22	mb/*: drop GENERIC_SPD_BIN from boards without soldered memory	Michael Niewöhner
2020-09-22	soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFN	Sumeet R Pawnikar
2020-09-21	mb/intel/tglrvp: Enable CSE Firmware Lite SKU	Jamie Ryu
2020-09-21	mb/intel: Drop unneeded empty lines	Elyes HAOUAS
2020-09-21	mb/intel/tglrvp: Enable HECI interface	Jamie Ryu
2020-09-19	apollolake boards: Enable CSE in devicetree	Subrata Banik
2020-09-17	nb/intel/sandybridge: Drop casts from DEFAULT_{MCHBAR,DMIBAR}	Angel Pons
2020-09-17	nb/intel/sandybridge: Drop invalid `DEFAULT_RCBABASE` macro	Angel Pons
2020-09-15	mb/intel/jasperlake_rvp: Fix wrong comments for ECT	Subrata Banik
2020-09-09	geminilake: Factor out MAX_CPUS value	Angel Pons
2020-09-09	soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol	Angel Pons
2020-09-08	mb/intel/jasperlake_rvp: Add DTT support for jslrvp	Sumeet R Pawnikar
2020-09-06	mb: remove duplicated Make code for spd.bin generation	Michael Niewöhner
2020-09-06	mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY	Michael Niewöhner
2020-09-04	mb/*/Kconfig: Drop redundant 'select CPU_INTEL_HASWELL'	Elyes HAOUAS
2020-09-03	soc/intel/cnl: Add new Kconfig option which matches its FSPs name	Felix Singer
2020-09-02	mb/*/Kconfig: Drop redundant 'select GENERATE_SMBIOS_TABLES'	Elyes HAOUAS
2020-09-01	mb/*/Kconfig: Drop redundant 'select CONSOLE_SERIAL'	Elyes HAOUAS
2020-08-31	mainboard/intel/tigerlake: Update SPD files for TGL-UP3 RVP	Shreesh Chhabbi
2020-08-26	mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4	Sugnan Prabhu S
2020-08-26	mb/intel/jasperlake_rvp: Enable I2C4 for UFC	Sugnan Prabhu S
2020-08-24	mb/intel/jslrvp: Correct PCI root port mapping	Maulik V Vaghela
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	mb/intel/tglrvp: Disable TBT_PCIE3 for UP4	John Zhao
2020-08-17	mb/intel/jasperlake_rvp: Configure GPIOs related to UFC	Pandya, Varshit B
2020-08-17	mb/tglrvp: Update SPD files for Hynix	Anil Kumar
2020-08-17	mb/intel/jasperlake_rvp: Re-organize the FMAP layout	Karthikeyan Ramasubramanian
2020-08-17	x4x boards: Remove unused/deprecated cmos bits	Arthur Heymans
2020-08-17	mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur	V Sowmya
2020-08-13	mb/intel/tglrvp: Set gpio GPP_H1 for soundcard detection	Shaunak Saha
2020-08-12	mb/intel/tglrvp: Add interrupt _CRS under CREC scope	John Zhao