| Age | Commit message (Expand) | Author |
|---|
| 2012-11-16 | Fix PIRQ routing abstraction | Stefan Reinauer |
| 2012-11-16 | Fix Kconfig GENERATE_*_TABLE usage | Stefan Reinauer |
| 2012-11-16 | Drop Kconfig variable BOARD_HAS_HARD_RESET | Stefan Reinauer |
| 2012-11-16 | Drop unneeded BOARD_HAS_FADT option | Stefan Reinauer |
| 2012-11-16 | Reduce number of per-mainboard changes | Stefan Reinauer |
| 2012-11-14 | Move HAVE_SMI_HANDLER from mainboards to chipsets | Stefan Reinauer |
| 2012-11-14 | SMM: Save the GNVS pointer when creating APCI tables | Duncan Laurie |
| 2012-11-14 | SMM: Avoid use of global variables in SMI handler | Duncan Laurie |
| 2012-11-13 | Make EmeraldLake2 work again | Duncan Laurie |
| 2012-11-12 | ACPI: Zero pstate/cstate control values in FADT | Duncan Laurie |
| 2012-11-06 | Drop redundant CHIP_NAME in mainboard.c | Kyösti Mälkki |
| 2012-11-06 | intel/socket_BGA956: enable speedstep, CAR, MMX, SSE | Patrick Georgi |
| 2012-11-01 | Merge cpu/intel/acpi.h into cpu/intel/speedstep.h | Nico Huber |
| 2012-10-08 | hpet: common ACPI generation | Patrick Georgi |
| 2012-10-05 | Use mainboard_interrupt_handlers everywhere | Patrick Georgi |
| 2012-08-08 | Cleanup coreboot memory table includes | Kyösti Mälkki |
| 2012-08-08 | Drop HAVE_MAINBOARD_RESOURCES | Kyösti Mälkki |
| 2012-08-01 | Intel and GFXUMA: drop redundant use of lb_add_memory_range() | Kyösti Mälkki |
| 2012-07-26 | Drop mainboard chip.h | Stefan Reinauer |
| 2012-07-26 | Remove copies of rtl8168.c | Patrick Georgi |
| 2012-07-24 | ChromeOS: Remove board specific acpi_get_vdat_info() | Stefan Reinauer |
| 2012-07-24 | Drop (empty) sandybridge_late_initialization() | Stefan Reinauer |
| 2012-07-24 | Remove CMOS Extended range enable from romstage | Duncan Laurie |
| 2012-07-24 | Move GGL0001 ACPI code to generic ChromeOS code | Stefan Reinauer |
| 2012-05-26 | Move subsystem IDs to devicetree.cb | Stefan Reinauer |
| 2012-05-08 | Clean up #ifs | Patrick Georgi |
| 2012-05-03 | Don't pre-enable SATA AHCI in romstage.c | Stefan Reinauer |
| 2012-05-02 | ChromeOS: drop unused debug header description | Stefan Reinauer |
| 2012-05-01 | Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards | Stefan Reinauer |
| 2012-05-01 | Clean up Emerald Lake 2 mainboard directory | Gabe Black |
| 2012-05-01 | Allow more CPU cores on Emerald Lake 2 CRB | Stefan Reinauer |
| 2012-05-01 | Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2. | Gabe Black |
| 2012-05-01 | Fix Sandybridge/Ivybridge mainboards according to code review | Stefan Reinauer |
| 2012-05-01 | Set up the Emerald Lake 2 SMI and SCI sources based on the schematic. | Gabe Black |
| 2012-04-30 | Add support for Intel Emerald Lake 2 CRB | Stefan Reinauer |
| 2012-04-27 | Move top level pc80 directory to drivers/ | Stefan Reinauer |
| 2012-04-20 | Refactor some alignment handling | Patrick Georgi |
| 2012-04-15 | cmos.layout: Remove invalid warning | Vikram Narayanan |
| 2012-03-16 | Intel northbridge I945: Apply un-written naming rules | Kyösti Mälkki |
| 2012-03-08 | Unify Local APIC address definitions | Patrick Georgi |
| 2012-02-24 | Ati video: Apply un-written naming rules | Kyösti Mälkki |
| 2012-02-22 | ACPI: More ../../.. removal | Patrick Georgi |
| 2012-02-17 | intel/i82801cx: Move HAVE_HARD_RESET to southbridge | Patrick Georgi |
| 2012-02-17 | intel/i82801ex: Move HAVE_HARD_RESET to southbridge | Patrick Georgi |
| 2012-02-10 | Intel cpus: apply un-written naming rules | Kyösti Mälkki |
| 2012-01-31 | northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig option | Peter Stuge |
| 2011-12-02 | i3100: Add HAVE_HARD_RESET | Sven Schnelle |
| 2011-10-30 | remove usbdebug.h include from mainboard/romstage code | Sven Schnelle |
| 2011-10-28 | Get rid of the old romstage-as-bootblock ROM layout | Patrick Georgi |
| 2011-10-13 | Use default table creator macro for all SSDTs | Stefan Reinauer |
