coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-08-26	mb/intel/jasperlake_rvp: Configure GPIO pad to enable I2C4	Sugnan Prabhu S
2020-08-26	mb/intel/jasperlake_rvp: Enable I2C4 for UFC	Sugnan Prabhu S
2020-08-24	mb/intel/jslrvp: Correct PCI root port mapping	Maulik V Vaghela
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	mb/intel/tglrvp: Disable TBT_PCIE3 for UP4	John Zhao
2020-08-17	mb/intel/jasperlake_rvp: Configure GPIOs related to UFC	Pandya, Varshit B
2020-08-17	mb/tglrvp: Update SPD files for Hynix	Anil Kumar
2020-08-17	mb/intel/jasperlake_rvp: Re-organize the FMAP layout	Karthikeyan Ramasubramanian
2020-08-17	x4x boards: Remove unused/deprecated cmos bits	Arthur Heymans
2020-08-17	mb/intel/jslrvp: Update SLP_Sx assertion widths and PwrCycDur	V Sowmya
2020-08-13	mb/intel/tglrvp: Set gpio GPP_H1 for soundcard detection	Shaunak Saha
2020-08-12	mb/intel/tglrvp: Add interrupt _CRS under CREC scope	John Zhao
2020-08-12	sb/intel/i82801jx/sata.c: Drop always-false is_mobile check	Angel Pons
2020-08-10	mb/tgl: Enable SaGv for TGL-UP3 RVP	Shreesh Chhabbi
2020-08-08	soc/intel/skylake: Enable CIO depending on devicetree configuration	Felix Singer
2020-08-08	soc/intel/skylake: Enable SA IMGU depending on devicetree configuration	Felix Singer
2020-08-08	soc/intel/skylake: Enable SDXC depending on devicetree configuration	Felix Singer
2020-08-07	soc/intel/skylake: Enable thermal subsystem depending on devicetree	Felix Singer
2020-08-07	soc/intel/cnl: Set Heci1Disable depending on devicetree config	Felix Singer
2020-08-07	mb/intel/kblrvp: Factor out `IoBufferOwnership`	Angel Pons
2020-08-07	mb/intel/kblrvp: Factor out `HeciEnabled`	Angel Pons
2020-08-05	mb/intel/jasperlake_rvp: Replace static camera ACPI by driver	Sugnan Prabhu S
2020-08-04	mb/**/{devicetree,overridetree}.cb: Indent with tabs	Angel Pons
2020-08-03	mb/intel/cedarisland: Remove duplicated code	Maxim Polyakov
2020-08-03	mb/intel/cedarisland: Use FSP_M_CONFIG structure to set UPD	Maxim Polyakov
2020-07-30	mb/intel/tglrvp/Kconfig: Drop unnecessary choice name	Angel Pons
2020-07-29	mb/intel/tglrvp: Update TCSS D3Hot and D3Cold configuration	John Zhao
2020-07-29	soc/intel/skylake: Enable HDA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable HECI3 depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable eMMC depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SMBus depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable LAN depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SATA depending on devicetree configuration	Felix Singer
2020-07-29	mb/intel/tglrvp: Add support for USB Type-C connector device properties	John Zhao
2020-07-28	mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up4	John Zhao
2020-07-28	broadwell: Factor out PIRQ routing from devicetree	Angel Pons
2020-07-28	lynxpoint: Factor out PIRQ routing from devicetree	Angel Pons
2020-07-26	mb/intel/cedarisland/Makefile: Add missing ramstage.c	Maxim Polyakov
2020-07-26	mb///devicetree.cb: Normalize disabled PIRQ values	Angel Pons
2020-07-26	src: Change BOOL CONFIG_ to CONFIG() in comments & strings	Martin Roth
2020-07-26	mb/intel/tglrvp: Update MAINBOARD_PART_NUMBER	Anil Kumar
2020-07-26	mb/x/acpi_tables: Do minor cleanup on includes	Kyösti Mälkki
2020-07-26	src: Remove extra lines in license header	Elyes HAOUAS
2020-07-26	skylake boards: Factor out copy-pasted PIRQ routes	Angel Pons
2020-07-26	mb/intel/saddlebrook/devicetree.cb: Use PCH_IRQ* macros	Angel Pons
2020-07-25	mb/intel/cedarisland: undo set trig and bufdis for NF pads	Maxim Polyakov
2020-07-23	mb/intel/jasperlake_rvp: Enable CSE Firmware Lite SKU for JSLRVP	Krishna Prasad Bhat
2020-07-23	mb/intel/jasperlake_rvp: Skip CPU Replacement Check for jasperlake rvp	Krishna Prasad Bhat
2020-07-20	sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASE	Angel Pons
2020-07-14	src: Remove unused 'include <cpu/x86/msr.h>'	Elyes HAOUAS