coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2015-01-06	mainboard/*/romstage.c: Fix 'lib/delay.c' inclusion	Edward O'Callaghan
2015-01-06	mainboard/*/romstage.c: Sanitize system header inclusions	Edward O'Callaghan
2014-12-02	Replace hlt with halt()	Patrick Georgi
2014-08-15	intel/cpu: rename car.h to romstage.h	Aaron Durbin
2014-08-14	Intel: Add common header file for CAR setup	Edward O'Callaghan
2014-07-30	Kconfig: Fix comments on endif to match the corresponding if	Daniele Forsi
2014-07-18	mainboard: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-04-26	superio/fintek/*: Factor out generic romstage component	Edward O'Callaghan
2014-04-02	superio/fintek/f71805f: Avoid .c includes	Edward O'Callaghan
2014-01-19	board-status: Add board_info.txt extracted from wiki.	Vladimir Serbinenko
2014-01-19	jetway/j7f4k1g2e and jetway/j7f4k1g5d: Add as clones of jetway/j7f2.	Vladimir Serbinenko
2014-01-19	jetway/j7f24: Rename to jetway/j7f2.	Vladimir Serbinenko