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2018-10-29mb/lenovo/t400: Use acpi_s3_resume_allowed()Paul Menzel
Apply commit 12d681b2 (intel/i945 gm45: Use acpi_s3_resume_allowed()) also to the Lenovo T400. See also commit 42ae0bae with Change-Id I4e1e0ccf2abbe175c0e5ddcbb6ee7bf6afb1ae88 (mb/lenovo/x200: Use acpi_s3_resume_allowed()) Change-Id: I9d4ac711375977a979a8b3e5606e2197847e88de Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/29147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-10-17mb/*/*: Clean up FADT checksum assignmentJonathan Neuschäfer
The assignment of header->checksum was in some cases done twice, or unnecessarily split into two lines. Change-Id: Ib0c0890d7589e6a24b11e9bda10e6969c7d73c56 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28988 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2018-09-28mb/lenovo/t400: Add 154WX5-TLB2 to display backlight PWM freq listArthur Heymans
Vendor VBT on ThinkPad R500 intends to set a 220MHz backlight PWM frequency which seems to work well. Change-Id: Ic1a12c7e3173468561ed5615319962d0abc6d61b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28643 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-09-28mb/lenovo/t400: Link the gpio.c settingsArthur Heymans
Linking this file instead of including a header makes it possible to easily change gpio settings for a variant. Change-Id: Ifd496510d4868f5901a9dbbf7f1523ccffaf15ab Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28628 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-28mb/lenovo/t400: Trim down the gpio.h fileArthur Heymans
Some settings like direction are only used if the mode is GPIO. Change-Id: I4efc54dfef3721b528b90d49f490014d9132cdf8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28627 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-20mb/lenovo/{T500, R400, W500}: Unify variants under T400Arthur Heymans
A negative side-effect is that those boards disappear from the board-status output, but this is an issue on all variants. Change-Id: Ic80804dc1f7d9c6f83ceee3db667019532c31d4c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28626 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-15mb/lenovo: Add Lenovo W500 as clone of Lenovo T400Paul Menzel
At ECC 2017 user Bob reports, that an image built for the Lenovo T500 runs on the Lenovo W500 without any issues. Change-Id: I17fd9725ab85ba2f0c99a70f40e35432265a81c1 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/22226 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Felix Singer <migy@darmstadt.ccc.de> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-15mb/*/*/cmos.default: Decrease debug_level to 'Debug'Elyes HAOUAS
Used default console log level is 7 in src/console/Kconfig. So let cmos.default use the same level as default. Change-Id: Ia39ee457a8985142f6e7a674532995b11cb52198 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
2018-08-13src/mb: Remove some unneeded includesElyes HAOUAS
Change-Id: I3108193c0e0b644cecb74ae0c7a7b54e24a75b58 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28049 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-19ec/lenovo/h8/acpi: Apply state on wakePatrick Rudolph
Implement ACPI S3 resume control to restore the state before entering sleep. * Store the requested state wake state for bluetooth and WWAN. * Add new methods to init the state and apply the requested state on wake. * Call the new method on all devices. Change-Id: I13c08b8c6b1bf0f3deb25a464b26880d8469c005 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22377 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-07-02src: Get rid of unneeded whitespaceElyes HAOUAS
Change-Id: I3873cc8ff82cb043e4867a6fe8c1f253ab18714a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-02src/mb: Fix non-local header treated as localElyes HAOUAS
Also remove some unnedded includes. Change-Id: I036208a111d009620d8354fa9c97688eb4e872ad Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27129 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-07-02mb/lenovo/t400: Change CMOS value name to Dual GraphicsNico Rikken
To uniform the naming of the 'Dual Graphics' mode amongst the ThinkPads that support it, the T400 CMOS value needs a change. This was the outcome of a discussion on another patch: https://review.coreboot.org/#/c/coreboot/+/23040/ This might cause breakage for automated NVRAM configuration scripts, and manuals. I only found one manual using the previous 'Switchable' option: https://libreboot.org/docs/install/r400_external.html#a-note-about-gpus Change-Id: I2e4d8bafbae5de97c78dab118f75fdefff1d7c37 Signed-off-by: Nico Rikken <nico@nicorikken.eu> Reviewed-on: https://review.coreboot.org/27158 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-06-29sb/intel/i82801ix: Use the common ACPI pirq generatorArthur Heymans
For this to work the northbridge and lpc bridge device need acpi_name functions. TESTED on Thinkpad X200, a valid PIRQ routing in SSDT in /sys/firmware/acpi/tables/SSDT Change-Id: I62e520f53fa3f928a8e6f3b3cf33af2acdd53ed9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22980 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-25nb/lenovo/t400: Enable libgfxinitArthur Heymans
Change-Id: I243c22c83a5575c2e1500cc869c41691c4fba415 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27014 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-02src/mainboard: Add and update license headersMartin Roth
This change adds and updates headers in all of the mainboard files that had missing or unrecognized headers. After this goes in, we can turn on lint checking for headers in all mainboard directories. Change-Id: Ibe038a8f7468253b21fd2ac90c045d0c9cc89dfc Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26568 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-08mb/lenovo: Get rid of device_tElyes HAOUAS
Use of device_t has been abandoned in ramstage. Change-Id: Ic044fc074c43db683fcd85ce92a36a8c5a464a67 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-01-26mb/*/*/cmos.layout: Fix the values for the console levelArthur Heymans
Fix the values that were off by one. This was discovered when using postcar stage that prints with debuglevel BIOS_NEVER. Change-Id: I73a077950ed0dc735d89c9747a8da0a25f30822d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-17cpu/intel/speedstep: Fix the PNOT ACPI methodArthur Heymans
The PNOT method never notifies the CPU to update it's _CST methods due to reliance on inexisting variable (PDCx). Add a method in the speedstep ssdt generator to notify all available CPU nodes and hook this up in this file. The cpu.asl file is moved to cpu/intel/speedstep/acpi since it now relies on code generated in the speedstep ssdt generator. CPUs not using the speedstep code never included this PNOT method so this is a logical place for this code to be. Change-Id: Ie2ba5e07b401d6f7c80c31f2bfcd9ef3ac0c1ad1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-12mb/lenovo/t400/blc.c: Add a new panel to the listArthur Heymans
Also adds a comment in the code to clarify what this array is about. Change-Id: I04b185a5dbd7a7ccb039820f19d2cb549b9a2eac Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22809 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-11-23sb/intel/i82801ix: fetch initial timestamp in bootblockArthur Heymans
TESTED on Thinkpad x200 Change-Id: I3cd286709f8734793dc6ae303215433eff29d25b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-11-17mb/lenovo/t400/blc.c: Add LTN154P2-L05 to whitelistKevin Keijzer
TESTED on Lenovo T500 Change-Id: I5546641cb34264e29ccb3398dd68f6144dafe524 Signed-off-by: Kevin Keijzer <kevin@quietlife.nl> Reviewed-on: https://review.coreboot.org/22367 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-11-17mb/lenovo/t400: Add LTN154X3-L02 to list of known displaysKevin Keijzer
TESTED on Lenovo T500 Change-Id: I9c9fef82ca4af99c7d4813e0ab0e315fde93b972 Signed-off-by: Kevin Keijzer <kevin@quietlife.nl> Reviewed-on: https://review.coreboot.org/22475 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-09-23mb/*/*: Remove rtc nvram configurable baud rateArthur Heymans
There have been discussions about removing this since it does not seem to be used much and only creates troubles for boards without defaults, not to mention that it was configurable on many boards that do not even feature uart. It is still possible to configure the baudrate through the Kconfig option. Change-Id: I71698d9b188eeac73670b18b757dff5fcea0df41 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-09-11mb/lenovo/*/devicetree: Add BDC detection supportPatrick Rudolph
Add support for BDC detection, based on the schematics for each board. Support for boards without schematics needs further testing. Needs test on all boards. Change-Id: If33ef88fb808f36b050393fa83eb1b541ce936b9 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-08-28mb/lenovo/t400/blc.c: Add B141EW05 V3 to whitelistKevin Keijzer
TESTED on Lenovo T400 Change-Id: I365aeb7e997def225c23d3287558bdc4eefa4298 Signed-off-by: Kevin Keijzer <kevin@quietlife.nl> Reviewed-on: https://review.coreboot.org/21230 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-08-27mb/lenovo/*/acpi_tables: Add critical and passive thresholdPatrick Rudolph
Add critical and passive threshold to be advertised in thermal zone 0. Change-Id: Ic75a80994b27ac19651ed52b7fc3c00c65cd9c01 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/21160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-08-10mb/lenovo/t400: Switch to new hybrid graphics driverPatrick Rudolph
Use new hybrid graphics driver to get device state. Move remaining code to romstage.c. Tested on Lenovo T500: * Linux 4.11.4 on Fedora 25 * Integrated (using NGI) * Discrete (using VGA OpROM) * Switchable (using NGI and VGA OpROM), tested with DRI_PRIME No regressions found. Change-Id: Iad2eccaab19c71f11308853ba9326d8186e67c93 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/20793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-07-06mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
Change-Id: I1f906c8c465108017bc4d08534653233078ef32d Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-07-02mb/lenovo/t400/dock: Control LEDsPatrick Rudolph
Toggle LEDs after successful dock and undock. On boot the LED will light up and on undock button press the LED will turn off again. Tested on Lenovo T500. Change-Id: Ib5851f4abcedf4041faae6b3b810102012f488cd Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/20327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-15nb/intel/gm45: Don't allow too low values for gfx_uma_sizeArthur Heymans
Too low gfx_uma_size can result in problems if the framebuffer does not fit. This partially reverts: 7afcfe0 "gm45: enable setting all vram sizes from cmos" Change-Id: I485d24198cb784db5d2cfce0a8646e861a4a1695 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20194 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-12nb/intel/gm45: Add romstage timestampsArthur Heymans
Change-Id: I558e6c63caf95ec5279ec5a866b54fb199116469 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-06-06mb/*/*/cmos.layout: Make multibyte options byte alignedArthur Heymans
Changes the offsets of some options so that options that span multiple bytes are byte aligned. To make the cmos.layout file more consistent some things where moved around in the cmos.layout of thinkpads X200 and T400. Change-Id: Ic84a2a5dc6f9c102f041085871c2ed55e2f3692a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-02Kconfig: Rework MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFGNico Huber
* Rename it to HAVE_VGA_TEXT_FRAMEBUFFER. * Let drivers select it if they are in charge. * Don't select it on the mainboard level if a driver handles it. Change-Id: I2d9d09be9aa6d019e77460e69a245ad2d8cda4ea Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-21mb/lenvovo/*: Clean mainboard.c and devicetreePatrick Rudolph
* Move board specific SPI registers to devicetree * Remove unused headers * Remove obsolete methods * Fix coding style * Fix Thinkpad L520 SPI lvscc register Except for Thinkpad L520, no functional change has been done, just moving stuff around. Change-Id: I692a5632030fe2fedbe9a90f86251000f1360fb2 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-19mb/lenovo/t400: Generate undock event with dock buttonArthur Heymans
Change-Id: I1161ed5f5c30201d2ad156d8fce4e8a90e65bff6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-11nb/intel/gm45: Define and use default MMCONF_BASE_ADDRESSArthur Heymans
Change-Id: I2308b069b8f2c601254169bcb6a34442c537a311 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-03nb/intel/gm45: Set display backlight according to EDID stringArthur Heymans
Add some known good values for some thinkpads displays. Known good means that at this pwm frequency the display is evenly lit on all duty cycles, the display makes minimal to no noise at lower duty cycles and the display does not flicker. This values differs from vendor (which uses an obviously wrong display clock (190MHz instead of 320MHz) resulting in frequency more than 60% off the intended value. TESTED on Thinkpad X200 with edid ascii string in list and removed from list to see if notice message is shown. Change-Id: Id7bc0d453fac31e806852206ba2c895720b2c843 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19500 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-03-11lenovo/t400/dock.c: Fix issues found by checkpatch.plPaul Menzel
Change-Id: If7ebab8af1ae0c048cb89c2feb5f6a65848b6952 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/18767 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-03-11lenovo/t400: Rewrite dock from t60Kyösti Mälkki
Old dock.c copied from x201 was incorrect. Do a rewrite of t60 dock code as pnp devices. Fixes USB and serial on the dock, if it is already connected when computer is powered on. DVI and ethernet worked without this patch. Hot-plug is yet to be fixed. Change-Id: Ib20a0eff10d0cde92dd089baf4fca28b117dc999 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18054 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-02-28mainboard/lenovo: Power off USB and mute audio before entering S3Nicola Corna
Currently, the USB ports are still powered during S3, so turning them off may reduce the power consumption. Note that, when the USB Always on feature is enabled, the USB ports are always powered, regardless of the USBP state. This patch also disables the audio, as it might consume some power or generate some noise. Both the USB power and the audio are reenabled by coreboot during the poweron. Change-Id: If0431b1315fffef2e372e7023f830a66bb7fddae Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18464 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-02-28Select a default SeaBIOS PS2 timeout in H8 KconfigArthur Heymans
This timeout is probably needed on all devices with Lenovo H8 embedded controllers so set the default there. Change-Id: I830ab1894f7c0f10f55c82e398becf44d810852d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18274 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-02-19mb/lenovo/t400: Implement hybrid graphic in romstageArthur Heymans
The hybrid driver select by DRIVERS_LENOVO_HYBRID_GRAPHICS doesn't work for t400/t500. Replace it with a custom romstage implementation. Tested on Lenovo T500 with dual graphics: * Intel Native GFX init * AMD VBios * GNU Linux 4.8.13 * SeaBios as payload * Discrete is working (44 W) * Integrated is working (24 W) * Switchable is working (34 W) ** Both GPUs are enabled, with Intel being connected to the panel ** DRI_PRIME allows to use AMD GPU ** ACPI doesn't seem to work (no vgaswitcheroo) Depends on Change-Id: I4dc00005270240c048272b2e4f52ae46ba1c9422 Depends on Change-Id: If389016f3bb0c4c2fd0b826914997a87a9137201 Change-Id: I7496876e9b434d4a2388e1ede27ac604670339b7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18010 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-01-13mb/lenovo/t400,x200,x201: Do not select DRIVERS_ICS_954309Arthur Heymans
This driver to configure the clock generator is not used. Change-Id: I156a42dfc336ff45acdcb6d8618bbd12671b66a7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18104 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-10mb/lenovo/t400: Increase MAX_CPUS to 4Arthur Heymans
The Lenovo T400 has a CPU socket that can fit quad cores. Change-Id: I585775ac9510cc7d2c2d731531f536c1a56b81e8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18059 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-12-13lenovo: Don't use extern with functionsKyösti Mälkki
Change-Id: I8313ba1d93922297e5061701dad47d07617d1dcd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17804 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-13mb/lenovo/*00: Remove Roda/RK9 specific codeNico Huber
Change-Id: Iacf2e1c0b8003a3588ccbf79e17500ed12f39503 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/17786 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-12-11intel/gm45: Use romstage_handoff for S3Kyösti Mälkki
Don't use scratchpad registers when we have romstage_handoff to pass S3 resume flag. Also fixes console log from reporting early in ramstage "Normal boot" while on S3 resume path. Change-Id: I4e2eabc59ff87b7ed40cfc9885bbe0256fe4a695 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17674 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-11intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki
Adapt implementation from skylake to prepare for removal of HIGH_MEMORY_SAVE and moving on to RELOCATABLE_RAMSTAGE. With this change, CBMEM region is set early-on as WRBACK with MTRRs and romstage ram stack is moved to CBMEM. Change-Id: Idee5072fd499aa3815b0d78f54308c273e756fd1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15791 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 21:28:25 +0000