coreboot - Some coreboot project code with my work

Age	Commit message (Collapse)	Author
2018-12-19	smsc/sch5147: Implement ACPI handling of a few LDN	Arthur Heymans
	Change-Id: Ide30a7396b6248e2037041e177dc8514533718a4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-12-19	mb/lenovo/thinkcentre_a58: Add mainboard	Arthur Heymans
	The following was tested: - Using two DDR2 DIMMs - S3 sleep and resume (on SeaBIOS it needs sercon disabled) - Ethernet NIC - Libgfxinit (native res and textmode) - SATA - USB - 800MHz FSB CPU (Pentium(R) E5200 @ 2.50GHz) - PS2 Keyboard - Serial output TODO: - Add ACPI code for SuperIO devices (done in a follow-up patch) - Add documentation TESTED with SeaBIOS (sercon disabled), Linux 4.19 Change-Id: I483e1143e4095b8a58fed142d31ca7f233a854e2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30239 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>