index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
/
mainboard
/
lenovo
/
x230
/
romstage.c
Age
Commit message (
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Author
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-01-06
mainboard/*/romstage.c: Sanitize system header inclusions
Edward O'Callaghan
2014-11-23
sandy/ivy/nehalem: Remerge interrupt handling
Vladimir Serbinenko
2014-10-24
sandy/ivy native: dedup romstage.c main()
Vladimir Serbinenko
2014-10-17
bd82x6x: Consolidate early native USB init
Vladimir Serbinenko
2014-10-16
bd82x6x: Move common bd82x6x S3 detect to bd82x6x code.
Vladimir Serbinenko
2014-10-16
sandybridge: Move common northbridge finalize to northbridge code.
Vladimir Serbinenko
2014-08-15
intel/cpu: rename car.h to romstage.h
Aaron Durbin
2014-08-14
Intel: Add common header file for CAR setup
Edward O'Callaghan
2014-07-29
sandy/ivybridge: Native raminit.
Vladimir Serbinenko
2014-06-20
sandy/ivy boards: Use acpi_s3_resume_allowed()
Kyösti Mälkki
2014-03-17
mainboard/lenovo/x230 Fix usage of GNU field designator extension
Edward O'Callaghan
2014-01-23
lenovo/x230: Enable wacom USB port
Vladimir Serbinenko
2014-01-23
lenovo/x230: Add missing copyright line.
Vladimir Serbinenko
2014-01-22
lenovo/x230: Fix CBMEM
Kyösti Mälkki
2014-01-22
Lenovo X230: new port
Vladimir Serbinenko