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path: root/src/mainboard/lenovo/x60
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2015-02-16mainboard/cmos: Delete obsolete commented parametersTimothy Pearson
Change-Id: Iccad79c142a7fcf89dd0fbebe8c07ad9ef019e91 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8459 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
On x86, change the type of the address parameter in read8()/read16/read32()/write8()/write16()/write32() to be a pointer, instead of unsigned long. Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330 Signed-off-by: Kevin Paul Herbert <kph@meraki.net> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7784 Tested-by: build bot (Jenkins)
2015-01-09macbook21 lenovo/xx: Fix inw() in SMI handlersKyösti Mälkki
Missing base may have enabled SMI for all GPI inputs. Change-Id: I1157afaccccb17d325a4efdb1f270a27f9a299ab Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8169 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-06mainboard/*/romstage.c: Sanitize system header inclusionsEdward O'Callaghan
Fix system include paths to be consistent. Chipset support is part of the Coreboot 'system' and hence 'non-local' (i.e., in the same directory or context). One possible product of this, is to perhaps allow future work to do pre-compiled headers (PCH) on the buildbot for faster build times. However, this currently just makes mainboard's consistent. Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8085 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-04mainboard: Sanitize some superio include paths to be non-localEdward O'Callaghan
This brings mainboard up to being consistent tree-wide now for all superio header path inclusions. Change-Id: I00a806ce209ba363c62e3ddd49db9bf599f32149 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8052 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-12-07lenovo: Remove duplicate devicetree.cb eventc entry.Vladimir Serbinenko
Keep only the last one: it was the one which was really used. Change-Id: I19132f6224d6847e615e3c582aaa6e66b0d56c7a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7677 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-03i945: Consolidate acpi/platform.aslVladimir Serbinenko
Change-Id: Iccb2dda8a427e483c04693e46b00e0bc2452a26b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7086 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-03i82801gx: Enable upper CMOS in bootblock.Vladimir Serbinenko
Otherwise checksum may not work correctly on early stages. For compatibility with old bootblocks also enable it early in romstage. Change-Id: Ie541d71bd76af182e445aa5ef21fe5ba77091159 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7556 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-02Replace hlt with halt()Patrick Georgi
There were instances of unneeded arch/hlt.h includes, various hlt() calls that weren't supposed to exit (but might have) and various forms of endless loops around hlt() calls. All these are sorted out now: unnecessary includes are dropped, hlt() is uniformly replaced with halt() (except in assembly, obviously). Change-Id: I3d38fed6e8d67a28fdeb17be803d8c4b62d383c5 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7608 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-20Replace includes of build.h with version.hKyösti Mälkki
As build.h is an auto-generated file it was necessary to add it as an explicit prerequisite in the Makefiles. When this was forgotten abuild would sometimes fail with following error: fatal error: build.h: No such file or directory Fix this error by compiling version.c into all stages. Change-Id: I342f341077cc7496aed279b00baaa957aa2af0db Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7510 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-09i945: consolidate sb & nb early initsVladimir Serbinenko
Change-Id: I00c2c725de5b982a5e4f584b77b09017a5bc0a72 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7062 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
2014-11-09i945: Consolidate common GNVS initVladimir Serbinenko
Change-Id: Idc3522807b17e56bdaf8f04b4bd68c6ed9777363 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7110 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-04i82801gx: Handle whole FADT in southbridge.Vladimir Serbinenko
Do all the handling in SB code with few parameters from devicetree.cb instead of having mobo callbacks. Change-Id: I8fd02ff05553a3c51ea5f6ae66b8f5502509e2bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7199 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-25Use spelling LENOVO troughout instead of using Lenovo sometimesVladimir Serbinenko
Change-Id: Ia4060831236d72f880eeff6263ada40cf195fb12 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7180 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-10-25lenovo/{x60,t60}: Change PARTNUMBER for consistencyVladimir Serbinenko
Change-Id: I0ace5f49b84170ab4701ad1b70d3c50c99066e53 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7178 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2014-10-18i945: Consolidate FADT codeVladimir Serbinenko
Change-Id: I076cba7d21926cabf90d485de50268ae40c435f3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7087 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-16smbios: Mark laptops as suchVladimir Serbinenko
Change-Id: I179a4cede2f826f72a400208748798737216c01a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7071 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2014-10-15i945: Convert to per-device ACPIVladimir Serbinenko
Change-Id: Iee3ee33ca58b8c722d2d38aae31e7130032512ad Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6804 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-09-13azalia: Shrink boilerplateVladimir Serbinenko
Change-Id: Ib3e09644c0ee71aacb067adaa85653d151b52078 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6840 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-09-05Consolidate intel vga int15 hooksVladimir Serbinenko
Change-Id: I9366dded98bf15f6da44ce893dd10698ba09fd55 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6820 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-09-02acpi_tables: Remove roda-specific access to 60f [copy-paste error]Vladimir Serbinenko
Change-Id: I12ce0dda823d7733c473ed5ef3b0470d95d794ae Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6805 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-09-01lenovo/x60: Remove leftover declarationVladimir Serbinenko
Change-Id: I1ab2118a3127dfacef6a389abd59050493e640fb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6817 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2014-08-30smbios: reorganise OEM strings handling.Vladimir Serbinenko
OEM strings should not be handled by mobo code but by common code with strings collected from all devices. Change-Id: Ibde61a1ca79845670bc0df87dc6c67fa868d48a9 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6788 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-08-17i945: Replace video gfx init.Vladimir Serbinenko
Old init was a replay not even meant to have been committed. This one really computes values and does its job. Tested on Macbook2,1 (1280x800) and X60 (1024x768). Change-Id: I61b6946c095fe06e20ae9a0db54696d0568225dd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5320 Reviewed-by: Francis Rowe <info@gluglug.org.uk> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-15intel/cpu: rename car.h to romstage.hAaron Durbin
This header has nothing to do with cache-as-ram. Therefore, 'car' is the wrong term to use. It is about providing a prototype for *romstage*. Change-Id: Ibc5bc6f3c38e74d6337c12f246846853ceae4743 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/6661 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-08-14Intel: Add common header file for CAR setupEdward O'Callaghan
When passing '-ffreestanding' the 'main' romstage.c may no longer necessarily be considered the entry point. From the C specification in 5.1.2.1 Freestanding environment; "In a freestanding environment (in which C program execution may take place without any benefit of an operating system), the name and type of the function called at program startup are implementation-defined." Clang complains about these being missing as Clang is somewhat more strict about the spec than GNU/GCC is. An advantage here is that a different entry-point type-signature shall now be warned about at compile time. Change-Id: I467001adabd47958c30c9a15e3248e42ed1151f3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5872 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-19lenovo/x60: Support digitizer on X60t and X201t.Vladimir Serbinenko
Change-Id: I5b0399a8edca3b73aa7d515d2c446c31b3239fa5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5239 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-07-18mainboard: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: If29a70be4fb56ebb0dbf6d510412cbe2f34480ef Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6291 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-17mainboard,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Ib531a54db7df6b49a6218f689dcaab712e9dfb01 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6292 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-08mainboard: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I05d6d22664155ac8478e665733f816776e277c22 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6200 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-05lenovo/x60/i915.c: Use define for `BSM`Paul Menzel
Although it builds without any further changes, including the header src/northbridge/intel/i945/i945.h where `BSM` is defined, would be useful. Unfortunately that conflicts with the already included header `southbridge/intel/bd82x6x/pch.h`, so it is left as is. Change-Id: I7c0a795338c34038169e082446907987364a0e88 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5932 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-06-25i945 boards: Switch to use DYNAMIC_CBMEMKyösti Mälkki
Change-Id: I1bbcba086f841a90544b827ae807a3c351d19d21 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6036 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-06-25i945 boards: Drop disabled ram_check() callsKyösti Mälkki
This code would not get enabled just by flipping the options in menuconfig, also ramcheck() no longer test the range like the parameters would imply. We should add non-destructive ram_check() on S3 resume path to verify memory controller configuration has been properly recovered. Change-Id: Ie4675c4770146c4312cdfbc81afa19f243f90ee4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6027 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-20google/link, lenovo/x60: i915io.c: Use define `ARRAY_SIZE`Paul Menzel
Change-Id: I8ddd46a573b61eba685efcc15456f288645d214d Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5936 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-06-20intel/i945 gm45: Use acpi_s3_resume_allowed()Kyösti Mälkki
Change-Id: I7811ee695f35c708144c4af5d43935deb22dd4df Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6061 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-06-01lenovo: Make version look like something thinkpad_acpi would acceptVladimir Serbinenko
thinkpad_acpi checks that BIOS version matches some pattern. Report version in this form. Not cleaned up as the idea of this patch seems to be met with resistance. Can make it Thinkpad-specific if the idea is accepted. Change-Id: I15e33e87e7a7f42d6a06f12fb39b5172153af8a1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4650 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-19intel: Remove GFXUMA and related global variablesKyösti Mälkki
Remove use of global variables uma_memory_base and uma_memory_size from builds with Intel northbridges, as these variables can be kept within the chipset or even as stack locals. Intel platforms have no functional implemenation for option GFXUMA. If we did implement some choice between external and integrated graphics, it needs to be named in less obscure fashion. Change-Id: I12f18c4ee6bc89e65a561db6c2b514956f3e2d03 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5720 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5570 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-01ChromeOS: Remove oprom_is_loadedKyösti Mälkki
A global flag oprom_is_loaded was used to indicate to U-boot that VGA option ROM was loaded and run, or that native VGA init was completed on GMA device. Implement this feature without dependency to CHROMEOS option and replace use of global variable oprom_is_loaded with call to gfx_get_init_done(). Change-Id: I7e1afd752f18e5346dabdee62e4f7ea08ada5faf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4309 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-04-29lenovo/{t60,x60}/devicetree.cb: Fix typo in Controller in commentPaul Menzel
$ git grep -l Cnotr | xargs sed -i 's/Cnotr/Contr/g' Change-Id: Iee826a8092dbf17f8a28b7eb7b6d183464c6e498 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5325 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-04-03lenovo/x60: Remove duplicate console_init()Kyösti Mälkki
For romstage, console_init() was called twice. The one in dock_connect() should have done only UART programming and not touch CBMEM console and/or USBDEBUG when those are enabled. Second case where dock_connect() is called is in SMI handler. If DEBUG_SMI is not enabled, console_init() does nothing in SMM. If DEBUG_SMI is enabled, console_init() is already called every time when enterining SMM. Change-Id: Ib3a842442cb7a5be9d6b71682cd6f368930af886 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5433 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-03-01lenovo/x60: Unify volume button handling with common code.Vladimir Serbinenko
Change-Id: I45fe44a91f9f83a510b204e01dbaff9e8a9696ca Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5099 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-02-16lenovo/x60: Change to common EDID framework.Vladimir Serbinenko
Currently lenovo/x60 gfx init provides vbe_mode_info_valid in incompatible way. Use EDID framework as do other inits. Change-Id: I887abd5a09064f26f473a2bf9caa2eb33e269c07 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5238 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-02-16lenovo/x60: Fix EDID byte-swapping.Vladimir Serbinenko
Change-Id: I75305ff7c5a8ba6142ef460e813acc014d9992bb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5249 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-02-01lenovo: Handle EEPROM/RFID chip.Vladimir Serbinenko
EEPROM/RFID chip present in thinkpad should be locked in a way to avoid any potential RFID access. Read serial number, UUID and P/N from EEPROM. This info is stored on AT24RF08 chip acessible through SMBUS. Change-Id: Ia3e766d90a094f63c8c854cd37e165221ccd8acd Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4774 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-01-22CBMEM: Replace cbmem_initialize() with cbmem_recovery()Kyösti Mälkki
The replacement function confirms CBMEM TOC is wiped clean on power cycles and resets. It also introduces compatibility interface to ease up transition to DYNAMIC_CBMEM. Change-Id: Ic5445c5bff4aff22a43821f3064f2df458b9f250 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4668 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2014-01-19board-status: Add board_info.txt extracted from wiki.Vladimir Serbinenko
board_info.txt is a file to be used by board-status to add some useful info to the generated table like flash chip type. This series is autogenerated from wiki page Supported_Motherboards. Change-Id: Ie2bda900713ef4883134477163320936c84c34f5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4701 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-12X60: Enable WWAN by default.Vladimir Serbinenko
Change-Id: I8e51a8fc03c1d7dbbdc11b121b3ea3ec18f65a5a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4670 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Make trackpoint enable a CMOS option.Vladimir Serbinenko
To be consistent with touchpad counterpart. Change-Id: I72d09b41b964f80a81fbf409ef69dd368834a3e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4654 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove trackpoint_enable from device tree.Vladimir Serbinenko
Change-Id: I6652e0ad4e0179950f775bbd0200484907bfc976 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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