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broadwell_refcode
e6230
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Some coreboot project code with my work
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wedge100s
Age
Commit message (
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Author
2019-01-15
mainboard/ocp/wedge100s: Fix uart
Patrick Rudolph
2019-01-14
soc/intel/fsp_broadwell_de: Move early_mainboard_romstage_entry()
Patrick Rudolph
2019-01-06
superio/*: Link early initialization into bootblock
Arthur Heymans
2018-12-19
mb/ocp/wedge100s/romstage: Workaround broken platform state
Patrick Rudolph
2018-11-23
mb: Set coreboot as DSDT's manufacturer model ID
Elyes HAOUAS
2018-11-21
mainboard/ocp/wedge100s: Add vboot support
Philipp Deppenwiese
2018-11-21
ACPI: Fix DSDT's revision field
Elyes HAOUAS
2018-10-17
mb/*/*: Clean up FADT checksum assignment
Jonathan Neuschäfer
2018-09-07
wedge100s: Add TPM support
Mikolaj Walczak
2018-09-07
fsp_broadwell_de: enable spi console
Okash Khawaja
2018-09-06
wedge100s: enable mrc cache in fmap
Okash Khawaja
2018-08-13
src/mb: Remove some unneeded includes
Elyes HAOUAS
2018-06-09
mainboard: Get rid of device_t in ramstage
Elyes HAOUAS
2018-05-31
cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE
Nico Huber
2018-05-05
mainboard/ocp/wedge100s: Initial commit
David Hendricks