index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mainboard
/
olpc
Age
Commit message (
Expand
)
Author
2006-07-21
These changes incorporate steve goodrich'es fixes, and one bug that is
Ronald G. Minnich
2006-06-27
fix interrupt for f5 (ehci)
Ronald G. Minnich
2006-06-24
fix typo on duplicate line.
Ronald G. Minnich
2006-06-22
set up interrupt values for the southbridge, and add a function to
Ronald G. Minnich
2006-06-18
fix idiiot typo I did not catch.
Ronald G. Minnich
2006-06-18
add irq mapper support for OLPC and other boards that need this mapping
Ronald G. Minnich
2006-06-10
changes from AMD for making OLPC video work.
Ronald G. Minnich
2006-06-08
further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB.
Ronald G. Minnich
2006-05-18
cleanup some of the compressed rom stream ugliness -- more to do!
Ronald G. Minnich
2006-05-16
Commit for IDE NAND FLASH
Ronald G. Minnich
2006-05-12
correct it, finally.
Ronald G. Minnich
2006-05-12
memory size in cf07
Ronald G. Minnich
2006-05-05
reorder early startup so that it might work.
Ronald G. Minnich
2006-05-03
more changes; rumba enet works fine now.
Ronald G. Minnich
2006-05-02
Fall back to pre-broken settings and setup for GX2.
Ronald G. Minnich
2006-04-27
we don't need msr_init
Ronald G. Minnich
2006-04-25
fix the msr.lo for olpc 0x20000019
Ronald G. Minnich
2006-04-23
fix so that olpc uarts come up enabled.
Ronald G. Minnich
2006-04-20
change to 5536
Li-Ta Lo
2006-04-20
boot to kernel
Li-Ta Lo
2006-04-18
add back in missing line
Ronald G. Minnich
2006-04-18
set up timing
Ronald G. Minnich
2006-04-18
add ram resources
Ronald G. Minnich
2006-04-18
added the olpc target and support
Ronald G. Minnich