coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-12-30	intel CAR: Fix DCACHE_RAM_BASE for old sockets	Kyösti Mälkki
2014-05-19	intel: Remove GFXUMA and related global variables	Kyösti Mälkki
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2012-11-14	Move HAVE_SMI_HANDLER from mainboards to chipsets	Stefan Reinauer
2012-08-08	Drop HAVE_MAINBOARD_RESOURCES	Kyösti Mälkki
2012-02-17	intel/82801dx: Move HAVE_HARD_RESET to southbridge	Patrick Georgi
2011-10-28	Get rid of the old romstage-as-bootblock ROM layout	Patrick Georgi
2010-12-08	Move "select CACHE_AS_RAM" lines from boards into CPU socket.	Uwe Hermann
2010-08-30	We call this cache as ram everywhere, so let's call it the same in Kconfig	Stefan Reinauer
2010-08-30	Restructured all vendors' Kconfig files to no longer source the boards'	Jens Rottmann
2010-08-03	Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user /	Stefan Reinauer
2010-07-06	Re-integrate "USE_OPTION_TABLE" code.	Edwin Beasant
2010-04-09	1. This patch adds CAR for Intel P6 series processors.	Joseph Smith
2010-03-17	This is kind of a pre CAR patch to properly allocate "shared" graphics memory	Joseph Smith
2010-03-17	more warning fixes.	Stefan Reinauer
2010-03-01	This patch implements MBI (modular bios interface) support to the i830 chipset.	Stefan Reinauer
2010-02-27	This does the following:	Stefan Reinauer
2010-02-09	Move all the copies of the romstage.inc rule to	Patrick Georgi
2010-01-25	Align several kconfig options to match newconfig:	Patrick Georgi
2009-10-26	Add kconfig menus for most chipset VIDEO_MB values.	Uwe Hermann
2009-10-16	Set default ROM sizes per-board to match the ROM chip that came	Uwe Hermann
2009-10-07	More boards in kconfig, and moved -O2 flag for romcc into	Patrick Georgi