| Age | Commit message (Expand) | Author |
|---|
| 2020-03-18 | mainboard/[^a-p]*: Remove copyright notices | Patrick Georgi |
| 2019-11-12 | src/mainboard/siemens: Use PTN3460 chip driver | Uwe Poeche |
| 2019-09-25 | mb/siemens/mc_apl{2,4,5}: Enable VBOOT | Werner Zeh |
| 2019-07-18 | mb/siemens/{mc_apl1,...,mc_apl5}: Fix GPIO settings | Mario Scheithauer |
| 2019-07-11 | mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168 | Mario Scheithauer |
| 2019-07-11 | mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed mode | Mario Scheithauer |
| 2019-05-29 | src/mainboard: Add missing 'include <types.h>' | Elyes HAOUAS |
| 2019-04-15 | mb/siemens/mc_apl4: Remove usage of external RTC | Werner Zeh |
| 2019-04-15 | mb/siemens/mc_apl1: Enable HDA in devicetree for all mainboard variants | Werner Zeh |
| 2019-04-04 | siemens/mc_apl4: Provide CLK on APL Pin PMU_SUSCLK | Uwe Poeche |
| 2019-03-06 | mb/siemens/{mc_apl1,mc_tcu3}: Fix typo on "Display" | Elyes HAOUAS |
| 2019-02-13 | siemens/mc_apl4: Enable HW SPI TPM on mainboard mc_apl4 | Uwe Poeche |
| 2019-01-16 | siemens/mc_apl4: Change UART_FOR_CONSOLE index | Mario Scheithauer |
| 2018-12-17 | siemens/mc_apl4: Enable RTC RX6110SA on this mainboard | Uwe Poeche |
| 2018-12-17 | siemens/mc_apl4: Enable LVDS Display on mc_apl4 | Uwe Poeche |
| 2018-12-17 | siemens/mc_apl4: Add GPIO configuration | Uwe Poeche |
| 2018-11-23 | siemens/mc_apl4: Set CPU clock to minimum ratio | Werner Zeh |
| 2018-11-16 | mb/siemens/mc_apl1/variants/mc_apl*: Remove unused BOARD_SIEMENS_MC_APL*_VAR | Elyes HAOUAS |
| 2018-11-16 | mb/*/*/Kconfig: Use CONFIG_VARIANT_DIR for devicetree | Peter Lemenkov |
| 2018-11-16 | siemens/mc_apl4: Clean up ramstage | Mario Scheithauer |
| 2018-11-16 | siemens/mc_apl4: Overwrite swizzle data for LPDDR4 | Mario Scheithauer |
| 2018-11-12 | siemens/mc_apl4: Enable SDCARD | Mario Scheithauer |
| 2018-11-12 | siemens/mc_apl4: Remove external RTC from I2C0 | Mario Scheithauer |
| 2018-11-12 | siemens/mc_apl4: Enable all PCIe root ports | Mario Scheithauer |
| 2018-11-12 | siemens/mc_apl4: Remove reduced clock rate for I2C0 | Mario Scheithauer |
| 2018-11-12 | siemens/mc_apl4: Disable CLKREQ of PCIe root ports | Mario Scheithauer |
| 2018-11-07 | siemens/mc_apl4: Add new mainboard variant mc_apl4 | Mario Scheithauer |
