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path: root/src/mainboard/siemens/mc_apl1/variants/mc_apl5
AgeCommit message (Expand)Author
2019-04-15mb/siemens/mc_apl1: Enable HDA in devicetree for all mainboard variantsWerner Zeh
2019-04-08siemens/mc_apl5: Remove reduced clock rate for I2C0Mario Scheithauer
2019-03-15mb/mc_apl1/variants/mc_apl5: Drop unused '#include <lib.h>'Elyes HAOUAS
2019-03-06mb/siemens/{mc_apl1,mc_tcu3}: Fix typo on "Display"Elyes HAOUAS
2019-02-05mb/siemens/mc_apl1: Enable VTD for mc_apl2 and mc_apl5Werner Zeh
2018-11-29siemens/mc_apl5: Disable PCI clock outputs on XIO bridgesMario Scheithauer
2018-11-29siemens/mc_apl5: Set bus master bit for on-board PCI deviceMario Scheithauer
2018-11-29siemens/mc_apl5: Enable SDCARDMario Scheithauer
2018-11-27siemens/mc_apl5: Adjust the settings for the PCIe root portsMario Scheithauer
2018-11-26siemens/mc_apl1/variants/mc_apl*: Remove unneeded PTN readMario Scheithauer
2018-11-18siemens/mc_apl5: Add new mainboard variant mc_apl5Mario Scheithauer
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