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2010-02-09Move all the copies of the romstage.inc rule toPatrick Georgi
src/arch/i386/Makefile.inc For that to work, I had to: - Add a CONFIG_ROMCC variable - Set that variable on all ROMCC boards - conditionally choose romcc or gcc rule based on that variable - remove those two rules from all the boards' Makefiles - switch a couple of boards to HAVE_OPTION_TABLE, as they actually have. Also remove the duplication of rules with the sole difference of if they depend on option_table.h or not. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08Clean up ACPI:Patrick Georgi
- unify all iasl related rules into the toplevel Makefile - build a filesystem standard for ACPI files and use it - pass ACPI sources through cpp, so constants can be shared between C and ACPI more easily - use cpp's #include instead of ACPI's Include() so cpp gets the whole picture Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-08janitor task: unify and cleanup naming.Stefan Reinauer
cache_as_ram_auto.c and auto.c are both called "romstage.c" now. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-02-07newconfig is no more.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-30* fix crt0s/ldscripts paths to fix out of tree build.Stefan Reinauer
* fix iasl output directory for i945 boards (patch for moving it to the mainboard directory will follow) * coreboot_table.c: lb_mainboard can be static * coreboot_table.c: dump memory table in debug and spew mode * fix a warning in bootblock.c * don't include arch/i386/init in arch/i386/Makefile.inc * announce generation of crt0_includes.h * allow overriding $(obj) * drop unused src_types from Makefile * correctly use hostname -s instead of hostname for COMPILE_HOST Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25More Kconfig changes to improve match with newconfig:Patrick Georgi
DIMM_SUPPORT APIC_ID_OFFSET ACPI_SSDTX_NUM IRQ_SLOT_COUNT MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID (except msi/ms9185) MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID MEM_TRAIN_SEQ HAVE_ACPI_RESUME Also remove MMX (kconfig specific) and HAVE_MOVNTI and IOAPIC (which we deliberately differ in kconfig) from compareboard report. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-25Align several kconfig options to match newconfig:Patrick Georgi
HT_CHAIN_UNITID_BASE HT_CHAIN_END_UNITID_BASE SB_HT_CHAIN_ON_BUS0 SB_HT_CHAIN_UNITID_OFFSET_ONLY MAX_CPUS MAX_PHYSICAL_CPUS ROM_SIZE TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 Also hook up asus/p2b-ds Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-01-18Move all IOAPIC selection to southbridges, and remove themPatrick Georgi
from mainboards. Some adaptations were necessary after the IOAPIC cleanup, so this should fix the build. Fix intel/d945gclf build, which was missing some ACPI component. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Fix technexion tim5690 build failure - REALMODE option required for x86.c ↵Marc Jones
mainboard function to be built. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23newconfig compilation failed withStefan Reinauer
(.text+0x4989): undefined reference to `vgabios_init' Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4991 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-12-23Add mainboard x86emu interrupt function support. Add tim5690 VGA BIOS ↵Libra Li
functions: int15 getting LCD panel ID. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-27Make newconfig and kconfig agree on MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_IDPatrick Georgi
Usually, this means adding values to Kconfig, but in a few cases, adding values to newconfig, too (which doesn't hurt). Also really hook up tyan/s2850 and tyan/s2875 to kconfig, and have them still build. Trivial and stupid kconfig changes, just lots of them. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25Trivial style changes, replace a few C++ type comments, and some code reusePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25This patch is buzzer of TechNexion TIM-5690.Libra Li
I forgot to svn add the speaker.c and speaker.h. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-25This patch is buzzer of TechNexion TIM-5690.Libra Li
Change EARLY_STAGE into __PRE_RAM__. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-18This is a patch to control the DIP switch and digital I/O.Libra Li
Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-09These are post codes for TIM-5690 LED debug message.Libra Li
Signed-off-by: Libra Li <libra.li@technexion.com> Added object reference to Config.lb, too and Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove drivers/pci/onboard. The only purpose was for option ROMs, which areMyles Watson
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Remove some white space and comment differences from devicetree.cb and Config.lbMyles Watson
files. These boards have non-trivial differences: gigabyte/m57sli kontron/986lcd-m dell/s1850 via/epia-m700 Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Drop all pre-CBFS rom_address entries in Config.lb/devicetree.cb.Uwe Hermann
Since we have CBFS setting rom_address in board files is no longer necessary. Also, drop vga_rom_address from RS690 completely, it was never used in the code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-11-06Split the two usages of __ROMCC__:Myles Watson
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26Add kconfig menus for most chipset VIDEO_MB values.Uwe Hermann
VIDEO_MB is a variable that defines how many MB of RAM will be used for onboard graphics frame buffer. It's northbridge-dependent which values for CONFIG_MB are valid (but not board-dependent). This patch adds choices for menuconfig to select the VIDEO_MB value for: - Intel 82810 - Intel 82830 - VIA CN400 - VIA CN700 Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're correct. If somebody has CN400 and CN700 datasheets, please verify. We drop all per-board VIDEO_MB variables in per-board Kconfig files as there's a northbridge-specific option/default now (plus the user can override the value if needed in menuconfig). As CONFIG_MB is chipset-specific but not board-specific (and never was), filter it in util/compareboard/compareboard, we don't need to match those values. Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and "Devices" sections into the "Chipset" menu, where NB-specific options will appear if you select a board using a certain NB, SB-specific options would appear in the "Southbridge" section etc. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26Define some variables that were not defined. There are a couple left.Myles Watson
Do kbuildall then grep not.defined kbuildall.results/* The interesting ones were GENERATE_* I had to put them in twice to make it work correctly: once outside the menu setting the defaults, and once inside the menu. Now they show up when they should, and are always defined Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0 in newconfig. Define MEM_TRAIN_SEQ to be an integer and set it correctly. Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10 MOVNTI is a performance enhancement, and should default to 0 so it doesn't break boards that forget to define it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-24Major cleanups of the hard_reset() code and config in coreboot.- supermicro/x6dhe_g/auto.c
- Drop unused "#object reset.o" entries. - Use CONFIG_HAVE_HARD_RESET for all "object reset.o" entries. - Drop dead/commented code, i.e. useless hard_reset() from: - supermicro/x6dhe_g/auto.c - supermicro/x6dhe_g2/auto.c - supermicro/x6dhe_g2/auto.updated.c - supermicro/x6dhr_ig/auto.c - supermicro/x6dhr_ig2/auto.c - digitallogic/msm586seg/auto.c - dell/s1850/auto.c - Add "obj-$(CONFIG_HAVE_HARD_RESET) += reset.o" to kconfig files of boards that actually have a reset.c file. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-22The LAN chip-set on the Technexion TIM-5690 is enabled by hardware andLibra Li
does not need any handling in software. Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20Remove CONFIG_CPU_AMD_FAM10 & CONFIG_CPU_AMDK8 from mainboards. They should beMyles Watson
selected in sockets, and they aren't used yet. Add a couple of variables to src/Kconfig for lack of a better place so that their selects work. Add select statements according to newconfig for some variables that were defined but never selected in mainboard configs. Fix #if CONFIG_VGA==1 -> #if CONFIG_VGA. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4816 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-20Fix all board names in Kconfig as per wiki / vendor website.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16Fix AP_CODE_IN_CAR (only selected for two boards), STACK_SIZE, and HEAP_SIZE.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-16Set default ROM sizes per-board to match the ROM chip that cameUwe Hermann
with the respective board. Of course, the user can still override the size in menuconfig. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15Fix Kconfig for technexion/tim5690.Libra Li
Signed-off-by: Libra Li <libra.li@technexion.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-15Add CONFIG_GENERATE_* for tables so that the user can select which tables notMyles Watson
to build, but by default all the tables that are available are built. Make PIRQ table build for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-13This patch support for the Technexion Tim-5690 mainboard.Libra Li
It's an embedded AMD RS690/SB600 mainboard. http://www.technexion.com/index.php/tim-5690 Myles added Kconfig support. Signed-off-by: Libra Li <libra.li@technexion.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-09Add const to get rid of some warnings when passing quoted strings.Myles Watson
Remove an unused extern declaration. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4756 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-08More kconfig:Patrick Georgi
AMD LX AMD SC520 boards by iei, pcengines, technexion, technologic, thomson Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-04This does away with CONFIG_ROM_PAYLOAD_START and CONFIG_PAYLOAD_SIZE.Patrick Georgi
Both were only really used in pre-cbfs, as the payload's size isn't relevant for the build process anymore. Various calculations in {no,}failovercalculation.lb are adapted accordingly. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-03Remove:Patrick Georgi
- CONFIG_CBFS - anything that's conditional on CONFIG_CBFS == 0 - files that were only included for CONFIG_CBFS == 0 In particular: - elfboot - stream boot code - mini-filo and filesystems (depends on stream boot code) After this commit, there is no way to build an image that is not using CBFS anymore. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23simplify source tree hierarchy: move files from sdram/ and ram/ to lib/Stefan Reinauer
It's only three files. Also fix up all the paths (Gotta love included C files) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22r4534 introduced devicetree.cb in every mainboard directory, but didn'tCarl-Daniel Hailfinger
copy any comment lines before the start of the device tree. Fix up amd/pistachio and technexion/tim8960. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-22r4646 enabled early usage of pci_{read,write}_config{8,16,32}Carl-Daniel Hailfinger
This allows us to change dword = pci_cf8_conf1.read32(&pbus, sm_dev->bus->secondary, sm_dev->path.pci.devfn, 0x64); to the much more readable dword = pci_read_config32(sm_dev, 0x64); Clean up all PCI operations in mainboards based on AMD 690: amd/pistachio amd/dbm690t technexion/tim8690 Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12Kconfig!Patrick Georgi
Works on Kontron, qemu, and serengeti. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> tested on abuild only. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11Enable CBFS everywhere. All boards compiled for me (abuild tested),Patrick Georgi
and we will fix issues as they appear. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-21This fixes a couple of issues with older Linux kernels (that expect an XSDT asStefan Reinauer
soon as there's an ACPI 2.0 or later table) * add XSDT support * add more table types This patch will break at least the kontron (and possibly some new boards I missed) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30the tool chain settings should not be in renamed (as they will never live inStefan Reinauer
Kconfig) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06When I started refactoring mainboard Config.lb, I added two differentCarl-Daniel Hailfinger
files for targets without failover: src/config/nofailovercalculation.lb (64 kB XIP) src/config/nofailovercalculation128.lb (128 kB XIP) Targets with other XIP sizes were ignored. This patch moves XIP size back into mainboard code. Benefits from this patch: - src/config/nofailovercalculation128.lb is no longer needed - Targets with XIP sizes besides 64k and 128k benefit from refactoring - Conceptually, this makes the include files pure calculation files without settings. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-04The point of the patch is to make it easier to understand the raminitMyles Watson
code, specifically the difference between pre_f and f code. The only functional changes are in printk statements. The rest is white space. 1. Remove some #if 0 and #if 1 blocks 2. Remove #if USE_DCACHE_RAM blocks. All K8 boards use CAR. 2. Correct typos (canidate -> candidate) 3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h 4. Try to minimize the differences between raminit.c and raminit_f.c 5. Make boards that have rev_f processors include the correct raminit code There is much more that could be done, but it's a start. Abuild tested and boot tested on s2892 and serengeti_cheetah. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
To ease some of my debugging pain on the unichrome, i decided i needed to move FB size selection into cmos, so i could test a size and then reset it to the default after loading this value so that the next reboot uses the (working) default again. This meant implementing set_option in parallel to get_option. get_option was then found to have inversed argument ordering (like outb) and passing char * and then depending on the cmos layout length, which made me feel quite uncomfortable. Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go. So all users of get_option now have their arguments inversed and switched from using ints to unsigned ints now. The way get_cmos_value was implemented forced us to not overlap byte and to have multibyte values be byte aligned. This logic is now adapted to do a full uint32_t read (when needed) at any offset and any length up to 32, and the shifting all happens inside an uint32_t as well. set_cmos_value was implemented similarly. Both routines have been extensively tested in a quick separate little program as it is not easy to get this stuff right. build_opt_tbl.c was altered to function correctly within these new parameters. The enum value retrieval has been changed strol(..., NULL, 10) to stroul(..., NULL, 0), so that we not only are able to use unsigned ints now but so that we also interprete hex values correctly. The 32bit limit gets imposed on all entries not marked reserved, an unused "user_data" field that appeared in a lot of cmos.layouts has been changed to reserved as well. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Various fixes to the tree to get coreboot-v2 to build on SolarisPatrick Georgi
- Replace $(PWD) with $(CURDIR) in Makefiles. I don't know why the Solaris version behaves differently, but CURDIR is a safe choice on gnu make (and we require gnu make already) - Use tail -1 instead of tail -n1 in a file that already relies on tail -1 support in another place - Use tail -1 as alternative to tail -n1 in another place - Use #define for ulong_t in romcc, as that name is used on Solaris - Avoid fprinting a null pointer. The standard doesn't mandate that this is a special case, and Solaris doesn't implement it that way. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Refactor copy_and_run so that it uses a single code base instead ofPatrick Georgi
3 (with one of them way too much assembler code). On the way, I had to make some changes to the way the code is built, which is an effort I want to expand over time. Right now, large portions of the in-ROM part of coreboot is compiled as a single file, with lots of .c files including other .c files. That has its justification for pre-raminit code, but it also affects lots of post-raminit code (memcpy doesn't really make sense before raminit, or at least CAR) The coreboot_apc code (AMD boards) gained some .c includes because I don't know that part of the code enough to really rework it and only have limited possibilities to test it. The includes should give an identical situation for this part of the code. This change was posted as set of 6 patches to the list, but they were mostly split for review purposes, hence commit them all at once. They can still be backed up using the patch files, if necessary. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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