coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-19	Remove Kconfig variable that has no effect	Patrick Georgi
2015-04-21	arm(64): Globally replace writel(v, a) with write32(a, v)	Julius Werner
2015-04-18	kconfig: automatically include mainboards	Stefan Reinauer
2015-04-06	New mechanism to define SRAM/memory map with automatic bounds checking	Julius Werner
2015-03-20	romstages: use common run_ramstage()	Aaron Durbin
2014-12-19	beaglebone: use new arm bootblock infrastructure	Alexander Couzens
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-04-30	uart: Support multiple ports	Kyösti Mälkki
2014-04-26	Rename coreboot_ram stage to ramstage	Furquan Shaikh
2014-04-09	uart: Redefine Kconfig options	Kyösti Mälkki
2014-03-04	console: Fix includes	Kyösti Mälkki
2014-03-04	uart: Drop HAVE_UART_MEMORY_MAPPED	Kyösti Mälkki
2014-01-22	board_info.txt: Classify almost all remaining boards.	Vladimir Serbinenko
2013-09-17	beaglebone: Stop reinitializing the console in bootblock.c.	Gabe Black
2013-07-16	beaglebone: Get rid of a redundant CBFS_ROM_OFFSET.	Gabe Black
2013-07-15	beaglebone: Put some code in romstage.c so we can tell if it ran.	Gabe Black
2013-07-10	armv7: Reserve space BL1 and checksum header by specifying bootblock offset.	Hung-Te Lin
2013-07-10	ARMv7: De-uboot-ify Exynos5250 code	Stefan Reinauer
2013-07-10	Rename hardwaremain() to main()	Stefan Reinauer
2013-07-01	beaglebone: Enable the clocks and pins for the configured UART.	Gabe Black
2013-06-10	beaglebone: Expand "ROM" size to 4MB.	Gabe Black
2013-06-10	beaglebone: Force on every other user LED to show that coreboot is running.	Gabe Black
2013-05-26	beaglebone: initial Kconfig and Makefiles	Gabe Black