coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2014-04-30	uart: Support multiple ports	Kyösti Mälkki
2014-04-26	Rename coreboot_ram stage to ramstage	Furquan Shaikh
2014-04-09	uart: Redefine Kconfig options	Kyösti Mälkki
2014-03-04	console: Fix includes	Kyösti Mälkki
2014-03-04	uart: Drop HAVE_UART_MEMORY_MAPPED	Kyösti Mälkki
2014-01-22	board_info.txt: Classify almost all remaining boards.	Vladimir Serbinenko
2013-09-17	beaglebone: Stop reinitializing the console in bootblock.c.	Gabe Black
2013-07-16	beaglebone: Get rid of a redundant CBFS_ROM_OFFSET.	Gabe Black
2013-07-15	beaglebone: Put some code in romstage.c so we can tell if it ran.	Gabe Black
2013-07-10	armv7: Reserve space BL1 and checksum header by specifying bootblock offset.	Hung-Te Lin
2013-07-10	ARMv7: De-uboot-ify Exynos5250 code	Stefan Reinauer
2013-07-10	Rename hardwaremain() to main()	Stefan Reinauer
2013-07-01	beaglebone: Enable the clocks and pins for the configured UART.	Gabe Black
2013-06-10	beaglebone: Expand "ROM" size to 4MB.	Gabe Black
2013-06-10	beaglebone: Force on every other user LED to show that coreboot is running.	Gabe Black
2013-05-26	beaglebone: initial Kconfig and Makefiles	Gabe Black