| Age | Commit message (Expand) | Author |
|---|---|---|
| 2009-06-06 | When I started refactoring mainboard Config.lb, I added two different | Carl-Daniel Hailfinger |
| 2009-04-21 | Thanks to Myles' patch adding support for include statements, | Carl-Daniel Hailfinger |
| 2008-12-10 | Use -O2 and -mcpu=p2 as romcc options for all Intel 440BX boards. | Uwe Hermann |
| 2008-09-04 | This changes the python generated makefiles | Carl-Daniel Hailfinger |
| 2008-01-18 | Please bear with me - another rename checkin. This qualifies as trivial, no | Stefan Reinauer |
| 2007-12-17 | Enable IDE legacy port access for all 440BX based boards per default, as | Uwe Hermann |
| 2007-11-13 | Various small fixes to make the Tyan S1846 match the format of | Uwe Hermann |
| 2007-06-03 | Tyan S1846: Minor fixes in static device tree (trivial): | Uwe Hermann |
| 2007-06-03 | Fix the static device tree of the Tyan S1846. Especially the | Uwe Hermann |
| 2007-05-03 | Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB, | Uwe Hermann |
| 2007-04-03 | Add initial framework for the Tyan S1846. | Uwe Hermann |
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index : coreboot | |
| Some coreboot project code with my work | vimacs |
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