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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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tyan
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s1846
Age
Commit message (
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Author
2008-12-10
Use -O2 and -mcpu=p2 as romcc options for all Intel 440BX boards.
Uwe Hermann
2008-11-27
Remove the unnecessary memctrl[] indirection, 440BX only has one
Uwe Hermann
2008-10-12
Drop tons of duplicated debug.c files, move common file to
Uwe Hermann
2008-10-01
The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
Carl-Daniel Hailfinger
2008-09-04
This changes the python generated makefiles
Carl-Daniel Hailfinger
2008-01-18
Rename almost all occurences of LinuxBIOS to coreboot.
Stefan Reinauer
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-12-17
Enable IDE legacy port access for all 440BX based boards per default, as
Uwe Hermann
2007-12-09
This adds the same line (uses CONFIG_PRECOMPRESSED_PAYLOAD) to every
Myles Watson
2007-11-13
Small fix to make abuild happy (trivial).
Uwe Hermann
2007-11-13
Drop obsolete failover.c, forgot it in the last commit (trivial).
Uwe Hermann
2007-11-13
Various small fixes to make the Tyan S1846 match the format of
Uwe Hermann
2007-06-03
Tyan S1846: Minor fixes in static device tree (trivial):
Uwe Hermann
2007-06-03
Fix the static device tree of the Tyan S1846. Especially the
Uwe Hermann
2007-05-27
Various 440BX and Tyan S1846 related minor changes and fixes (trivial):
Uwe Hermann
2007-05-04
Cosmetics (trivial).
Uwe Hermann
2007-05-03
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
Uwe Hermann
2007-04-03
Add initial framework for the Tyan S1846.
Uwe Hermann
