coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-07-31	Remove extra newlines from the end of all coreboot files.	Martin Roth
2016-06-04	AGESA boards: Split dispatcher to romstage and ramstage	Kyösti Mälkki
2016-06-04	AGESA f12 f15: Add OEM customisation	Kyösti Mälkki
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-05-10	AGESA: Drop unused AGESA_MEM_TABLE	Kyösti Mälkki
2015-02-14	AGESA fam10 fam12 fam15: Always have HT3_SUPPORT	Kyösti Mälkki
2014-12-19	mainboard: Strip out some dead includes	Edward O'Callaghan
2014-07-24	tyan/s8226: Remove a trailing whitespace	Elyes HAOUAS
2014-07-18	mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platforms	Edward O'Callaghan
2014-07-08	mainboard: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2012-11-20	Unify use of bool config variables	Stefan Reinauer
2012-10-04	add tyan s8226: add a new mainboard	Siyuan Wang