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2011-06-04Port persimmon r6591 to e350m1: ROM cache earlyMarshall Buschman
Enable rom cache early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6590 to e350m1: Work around memory allocation problemMarshall Buschman
Fix memory allocation problem in amdInitLate. Disabled until further debug. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6589 to e350m1: Strip down AGESA optionsMarshall Buschman
Remove some non-essential agesa options to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6588 to e350m1: VGA framebufferMarshall Buschman
Declare legacy video frame buffer so that Windows generic VGA driver will work. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6587 to e350m1: RTC is not PIIX4 compatibleMarshall Buschman
Declare RTC as not PIIX4 compatible to match AMD hardware. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6586 to e350m1: FADT revisionMarshall Buschman
Make fadt revision match its length. Solves Windows 7 checked build assert. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6584 and r6601 to e350m1: SPI prefetch earlyMarshall Buschman
Enable SPI cacheline prefetch early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6583 to e350m1: pstate 0 earlyMarshall Buschman
Switch processor cores to pstate 0 early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6582 to e350m1: 33 MHz SPI read earlyMarshall Buschman
Enable 33 MHz fast mode SPI read early to reduce boot time. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6578 and r6596 to e350m1: MMCONF basePeter Stuge
Remove multiple mmconf settings and just use kconfig setting. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6574 to e350m1: MMCONF sizeMarshall Buschman
Size mmconf according to CONFIG_MMCONF_BUS_NUMBER. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6573 to e350m1: VGA, PCI MMIO and SB800 legacyMarshall Buschman
1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support. 2) Extend PCI MMIO limit from dfffffff to fecfffff. 3) Add AMD recommended non-posted mapping for SB800 legacy devices. Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-04Port persimmon r6572 to e350m1: I/O APIC IDMarshall Buschman
1) Set I/O APIC ID according to BKDG recommendation 2) Correct I/O APIC ID reported by mptable Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-03advansus/a785e-i mainboard enable warning as errorKerry She
Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Kerry She <kerry.she@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-23AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-20Correct amd persimmon romstage code for early SPI prefetch enable.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Scott Duplichan <scott@notabs.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-20Move the ACPI FACP table to the front of the RSDT list. This is done to work ↵Scott Duplichan
around a Windows XP or Server 2003 setup failure where an error message such as: "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" occurs. This change updates AMD reference board projects, but could applied to others as well. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Remove multiple mmconf settings and just use kconfig setting.Marc Jones
Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Cosmetic cleanup.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-151) Remove unused kconfig options.Scott Duplichan
2) Correct UMA graphics PCI device ID. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Update gpp port configuration.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Enable rom cache early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Fix memory allocation problem in amdInitLate. Disabled until further debug.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Remove some non-essential agesa options to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Declare legacy video frame buffer so that Windows generic VGA driver will work.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Declare RTC as not PIIX4 compatible to match AMD hardware.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Make fadt revision match its length. Solves Windows 7 checked build assert.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Enable SPI cacheline prefetch early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Enable SPI cacheline prefetch early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Switch processor cores to pstate 0 early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Enable 33 MHz fast mode SPI read early to reduce boot time.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Match DIMM SPD addressing to implemented slots.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-15Size mmconf according to CONFIG_MMCONF_BUS_NUMBER.Scott Duplichan
Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-151) Use D18F1xF4 VGA Enable to simplify legacy video I/O support.Scott Duplichan
2) Extend PCI MMIO limit from dfffffff to fecfffff. 3) Add AMD recommended non-posted mapping for SB800 legacy devices. Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-151) Set I/O APIC ID according to BKDG recommendationScott Duplichan
2) Correct I/O APIC ID reported by mptable Signed-off-by: Scott Duplichan <scott@notabs.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6572 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-13siemens/sitemp_g1p1: Adapt read_option() to latest changesJosef Kellermann
Signed-off-by: Josef Kellermann <seppk@arcor.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-12Remove uart_init() in Siemens sitemp-g1p1Patrick Georgi
uart_init() was moved to common code in r6531, but I missed that when integrating the new mainboard code. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Patrick Georgi <patrick.georgi@secunet.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-11Add Siemens SITEMP-G1 boardJosef Kellermann
The code is loosely based on AMD dbm690t (and copied from there) and adapted to match the Siemens SITEMP-G1 board. It boots both Linux and Windows XP (and if it doesn't then complain with me [Patrick] because in that case I must have messed it up when integrating the patch) Signed-off-by: Josef Kellermann <seppk@arcor.de> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-10Change read_option() to a macro that wraps some API uglynessPatrick Georgi
Simplify read_option(CMOS_VSTART_foo, CMOS_VLEN_foo, somedefault) to read_option(foo, somedefault) Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-05-07ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) + SB820 ↵Kerry She
platform. Signed-off-by: Kerry She <kerry.she@amd.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-28Thinkpad: Enable Battery eventsSven Schnelle
Enable the following events for battery objects on Thinkpad X60/T60: 24: BAT0 critical 25: BAT1 critical 4A: BAT0 present 4B: BAT0 state change 4C: BAT1 present 4D: BAT1 state change Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Sven Schnelle <svens@stackframe.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-27X60: enable Ultrabay if device is plugged inSven Schnelle
Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-27T60: enable Ultrabay if device is plugged inSven Schnelle
Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-22The UART divider should be calculated based on the base frequencyStefan Reinauer
and baudrate, not hardcoded in addition to that. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-21some ifdef --> if fixesStefan Reinauer
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20run uart_init() from console_init, just like the other console ↵Stefan Reinauer
initialization functions. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20Add Lenovo ThinkPad T60Sven Schnelle
Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20pci1x2x: remove latency/bridge control/cacheline size settingsSven Schnelle
Those settings should be handled by the generic PCI/Cardbus code, and not by the driver itself. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Sven Schnelle <svens@stackframe.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-20pci1x2x: use pci_ops set_subsystem instead of custom codeSven Schnelle
Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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