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2014-01-22Lenovo X230: new portVladimir Serbinenko
probably a problem in MRC: - EHCI output failure after sysagent - no S3 - no MRC cache - MRC needs watchdog - less MTRR could be used by some memory map optimisations Not tested: - dock (probably doesn't work) - msata (probably works) - wwan (probably works) - mini displayport (probably works) Blobs: MRC VGA Oprom Change-Id: I5bdb9372971f48e048848d57b6c924b79782dbde Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4679 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-20google/butterfly: Remove unused cmos.layout optionsAlexandru Gagniuc
Do not expose options that are unsupported by the board. I tried for a couple of days to see why hyperthreading wasn't working. It's not supported by the CPU. The same applies to the baud_rate option. It makes no sense to expose it to userspace via nvramtool. Change-Id: I89b91820616d92fb4db20bf77f4b7f48a70353d5 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4697 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-20X201: Fix SMI bindings.Vladimir Serbinenko
Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4645 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-20google/falco/board_info.txt: Declare as a laptop.Vladimir Serbinenko
Change-Id: I42c77d03b6a5f8ef88f1276de543bb3fc55467af Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4755 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board_info.txt: Add mentions of thin client names.Vladimir Serbinenko
Based on info from old page Change-Id: Ibd07b5904569e510de249e4216875438a855ff57 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4746 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19linutop: Add Linutop-1 as a clone of artecgroup/dbe61Vladimir Serbinenko
Change-Id: I69e99e2a1bf9b890281caaf0633f91850d923241 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4747 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Add new category "sbc".Vladimir Serbinenko
Change-Id: I8a7bf265ebb30dd5997f93729a0329e74f463a23 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4739 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Add category "emulation".Vladimir Serbinenko
Change-Id: If9d26b9e4cb1895452316c9cf2e8c75a01cfd7c2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4738 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Remove some needless name overrides.Vladimir Serbinenko
Overrides were to have names in line with wiki but names derived from the tree are better in some cases. Change-Id: Ic805ba9a3b9c7f926dc9ef27f8673f2c18e9af34 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4737 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Change iei/kino's link to web.archive.org.Vladimir Serbinenko
Original link is dead. Change-Id: I56e975ee411f7290c12aad501f490ccc5dedaf05 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4736 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board_info.txt: declare chromebooks as laptops.Vladimir Serbinenko
Change-Id: I4a3ed7e9b6aaec8aba8ffc47eafdbcca31e4c700 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4734 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19board_info.txt: Categorize various boardsVladimir Serbinenko
Info supplied by: idwer Change-Id: I3086e8118a721ded33c578c6c82e20642ef9d776 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4733 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19boardstatus: Remove some needless name overrides.Vladimir Serbinenko
Overrides were to have names in line with wiki but names derived from the tree are better in some cases. Change-Id: Iff3c27db1a4936b03f976c82d872589e41df0c90 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4735 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19boardstatus: Handle clones.Vladimir Serbinenko
Change-Id: I7bfe19eb800729713a549dc0396765a9785e11b1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4732 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board-status: Add board_info.txt manually for irregular wiki entriesVladimir Serbinenko
Based on info from wiki. Change-Id: Iebd799abe48550c4df55632b8177d845df7d9a7d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4706 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19board-status: Add board_info.txt extracted from wiki.Vladimir Serbinenko
board_info.txt is a file to be used by board-status to add some useful info to the generated table like flash chip type. This series is autogenerated from wiki page Supported_Motherboards. Change-Id: Ie2bda900713ef4883134477163320936c84c34f5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4701 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-19jetway/j7f4k1g2e and jetway/j7f4k1g5d: Add as clones of jetway/j7f2.Vladimir Serbinenko
Change-Id: I16e027b78dc65538d8f0cd6f5e57bbdfc10b7169 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4729 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19jetway/j7f24: Rename to jetway/j7f2.Vladimir Serbinenko
Original actually meant j7f[24] which without square brackets became confusing. There is no such board as j7f24. This is a prerequisite to adding j7f4* as cloned boards Change-Id: Ia7708b13ac4141ef788183c7817fce1366919936 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4728 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-19via/epia-mii and via/epia-ml: Add as clones of epia-m.Vladimir Serbinenko
Change-Id: I4f297e7a7332acc6ceda6a99981599e3a372b696 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4727 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-18iei/rocky-512: Add it as an explicit clone of juki-511p.Vladimir Serbinenko
Change-Id: I87e2768de6728658a87729998648514824d79fd6 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4726 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-18A8N-SLI: Add it explicitly as a clone of A8N-EVladimir Serbinenko
Change-Id: Ieab7d46177eb92393914f8cb055675df00a9a375 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4723 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-16butterfly: fix compilation with !CHROMEOSVladimir Serbinenko
One of arguments to cbfs_get_file_content was missing. Change-Id: Icb4ef26f18d63c133bc32f1c62a524edee0621ea Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4696 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-01-15ROMSIZE: Add option for 12M chips.Vladimir Serbinenko
On X230 2 real chips (8 + 4) are merged into one virtual 12M chip. Change-Id: I49c251b1777fc9edccebc4a204b9c4a087bf2a8e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4688 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-15Intel (sandy/ivy): Avoid calling cbmem_initialize() twiceKyösti Mälkki
Delay the copying of MRC cache data from CAR to CBMEM until after sdram_initialize() returns and cbmem_initialize() completes. Calling cbmem_initialize() twice would complicate the decision logic of when CBMEM area needs to be wiped clean. Change-Id: Ic59e94cb2436293efc47b52f7418f5dbf76c714a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4666 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-15google/stout: Add EARLY_CBMEM_INITKyösti Mälkki
Required for MRC cache and for HAVE_ACPI_RESUME to work. Change-Id: I7d48b167bd581d7c14ca50bd46e74be0133cecfb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4665 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-01-15Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRRKyösti Mälkki
This change allows Kconfig options ROM_SIZE and CBFS_SIZE to be set with values that are not power of 2. The region programmed as WB cacheable will include all of ROM_SIZE. Side-effects to consider: Memory region below flash may be tagged WRPROT cacheable. As an example, with ROM_SIZE of 12 MB, CACHE_ROM_SIZE would be 16 MB. Since this can overlap CAR, we add an explicit test and fail on compile should this happen. To work around this problem, one needs to use CACHE_ROM_SIZE_OVERRIDE in the mainboard Kconfig and define a smaller region for WB cache. With this change flash regions outside CBFS are also tagged WRPROT cacheable. This covers IFD and ME and sections ChromeOS may use. Change-Id: I5e577900ff7e91606bef6d80033caaed721ce4bf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4625 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-01-14cubieboard: Setup CPU clock in romstage and load ramstageAlexandru Gagniuc
This completes the romstage for the cubieboard. Change-Id: If3272d8a9e414f782892bc41b34b5e2dece5d7e1 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4686 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-13cubieboard: Configure system voltages from devicetreeAlexandru Gagniuc
Change-Id: I93bac9bf94f5bafcd3ff0c3d5763b31d3ee9959b Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4640 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-12X60: Enable WWAN by default.Vladimir Serbinenko
Change-Id: I8e51a8fc03c1d7dbbdc11b121b3ea3ec18f65a5a Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4670 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Make trackpoint enable a CMOS option.Vladimir Serbinenko
To be consistent with touchpad counterpart. Change-Id: I72d09b41b964f80a81fbf409ef69dd368834a3e2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4654 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Remove trackpoint_enable from device tree.Vladimir Serbinenko
Change-Id: I6652e0ad4e0179950f775bbd0200484907bfc976 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: make wlan config a CMOS optionVladimir Serbinenko
To stay in line with wwan and bluetooth. Change-Id: Iafe2dc97fc2aec5c2ad1834659b796a6b079c1bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4652 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow control of low-battery beep.Vladimir Serbinenko
Change-Id: I2f422e83f2afcf0cc3f3ecbace01a8f4f39e87d4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4663 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Allow user to disable powermanagement beeps.Vladimir Serbinenko
They're pretty annoying. Change-Id: I44d26dc168927a9cedfd6ecc4c9a51a3a7b362c7 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4662 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ibexpeak / bd82x6x: Make SATA mode user-visible option.Vladimir Serbinenko
Ability to choose compatibility mode is interesting for testing payloads and OS for compatibility with older systems. As per comments "ide_legacy_combined # TODO: Does nothing since generations, remove from sb code?" The "combined" mode was removed. It wasn't used by any mobo and the code for it is almost identical to IDE one other than few bits relating to interrupt handling and ISA mode. Change-Id: I407a8fac753b513812a86bef5abcf39c6d81472e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4658 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Implement sticky Fn option.Vladimir Serbinenko
Useful for accessibility. Sticky modifier (sticky Fn) is a behaviour of modifier key when you don't have to hold it pressed to achieve the result. E.g. with normal Fn brightness up is: <Press Fn> <Press Home> <Despress Home> <Depress Fn> With sticky Fn you can do: <Press Fn> <Depress Fn> <Press Home> <Despress Home> Change-Id: I4da5adcea02428d936023891de08684cae77c44e Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4661 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12ec/lenovo/h8: Add an option to swap ctrl and fn.Vladimir Serbinenko
Tested on my X201 and X230. Change-Id: I3c7ec65681157d15c6e87eea64779a08e03ae5a8 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4660 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-01-12CBFS: use cbfs_get_file_content whenever possible rather than cbfs_get_fileVladimir Serbinenko
Number one reason to use cbfs_get_file was to get file length. With previous patch no more need for this. Change-Id: I330dda914d800c991757c5967b11963276ba9e00 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4674 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Tested-by: build bot (Jenkins)
2014-01-12ec/lenovo/h8: Remove wlan_enable and wwan_enable from device tree.Vladimir Serbinenko
wwan_enable was never used. wlan_enable isn't something for device tree but for CMOS config if at all. Change-Id: I765d9d6f0b73b7dc5a57c0c630a53b4b7a0b48cb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4651 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-10Replace all occurences of sprintf with snprintfVladimir Serbinenko
THis reduces risks of bufer overflows. Change-Id: I77f80e76efec16ac0a0af83d76430a8126a7602d Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4279 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-01-09X201: set default USB debug controller to 2.Vladimir Serbinenko
The other port is not easily accessible. Change-Id: I6ea31346a375debcd5fc1c27e4078e3a436715e3 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4635 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-09bd82x6x/ibexpeak: Make DRAM reset gate GPIO configurableVladimir Serbinenko
DRAM reset gate GPIO is different on different mobos move it to hidden config with 60 (current value) as default. Set it to 10 for Lenovo X201. Change-Id: I4f3b6876d7c33d4966315091b63a76a9a0064c16 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4622 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-01-09cubieboard: Initialize memory in bootblockAlexandru Gagniuc
Even though the Allwinner A10 is limited to a 24KiB bootblock, the memory initialization takes only about 3KiB and leaves enough room for an MMC or NAND driver, so init the memory early on. The advantage is that we can eliminate complicated logistics of where to cache CBFS and where to load the ramstage in SRAM. Change-Id: Id549552ed509434e831db60deaef28e04d62417f Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4630 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-01-09cubieboard: Keep AHB clock within specsAlexandru Gagniuc
The CPU was clocked at 384MHz in the bootblock, but the AHB bus has a maximum rated frequency of 250MHz. Its clock needs to be divided to keep it within spec. Overclocking the AHB bus hung the CPU when memory was accessed. Change-Id: I7cb9cdd1f126b3d5b0446fc68af79b54946bc2d3 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4629 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-01-09cubieboard: Turn on green LED during bootblockAlexandru Gagniuc
Change-Id: I807060bde374e4a42abe306cecf838ab157c9515 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4600 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-01-08cpu/allwinner/a10: Refactor API for gating clocks to peripheralsAlexandru Gagniuc
Rather than having to track which bit in which register should be cleared or set to gate or ungate the clock to a certain peripheral, provide a simplified enum which encodes the register and bit. This change comes with a function which decodes the enum and gates/ungates the clock. This also removes the register-dependent bitmasks for APB0 and APB1 gating registers. Change-Id: Ib3ca16e54eb37eadc3ceb88f4ccc497829ac34bc Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4571 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-08cpu/allwinner/a10: Refactor and document pinmux APIAlexandru Gagniuc
Include a function to multiplex more than one pin at a time. This is useful for peripherals that have the same function number for all their pins. Since we now have two functions for muxing pins, also document them. Change-Id: I53997cc3a2586e3cf749cd672f69fb427659c67f Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4565 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-08mainboard: Add preliminary support for A10-based CubieboardAlexandru Gagniuc
Add a minimal infrastructure which initializes the system clocks and serial console. Change-Id: I768ede6ccf8674ffe9fecd8925cec89768209cab Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4553 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-01-04X201: Fix native video initVladimir Serbinenko
Due to recent restructuring X201 native video init has disappeared from config options. Put it back and fix compilation with it. Change-Id: I6d9ba5da196c093abd2df89a6fe5efefece1fb3c Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4606 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-01-03asrock/imb-a180: Configure the 6 COM ports and the keyboardDave Frodin
Change-Id: I66d0715f3be201f8068acd7097e2be49185bee00 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/4574 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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