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path: root/src/northbridge/amd
AgeCommit message (Expand)Author
2010-10-11Factor out a few commonly duplicated functions from northbridge.c.Uwe Hermann
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-09Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Spell checking.Zheng Bao
2010-10-08Trivial. Fix the typo.Zheng Bao
2010-10-07Remove duplicate line from pci_ids.h.Jonathan Kollasch
2010-10-05Use %p instead of %x to print void *.Jonathan Kollasch
2010-10-02Fix spelling/typos in comments.Jonathan Kollasch
2010-10-01Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig,Patrick Georgi
2010-10-01Trivial. Re-indent the code.Zheng Bao
2010-09-30Rename build system variables to be more intuitive, andPatrick Georgi
2010-09-28Trivial. re-Indent the code.Zheng Bao
2010-09-27Obviously missing brackets.Xavi Drudis Ferran
2010-09-25Mark read-only data as read-only, so the global vars test doesn't fail on it.Patrick Georgi
2010-09-25- Fix race condition in option_table.h generation by moving the includeStefan Reinauer
2010-09-21Complete the code which was missing.Zheng Bao
2010-09-21Fix the typo. Field DisAutoRefresh is in DramTimngHi.Zheng Bao
2010-09-13Add reserved areas for fam10.Myles Watson
2010-09-13Port k8 UMA handling to fam10.Myles Watson
2010-09-13Fix a typo reported by Sylvain Hitier.Myles Watson
2010-09-10Move memory type information out of some AMD sockets.Myles Watson
2010-09-09Please find appended. This patch gets rid of the %gs magic altogether,Arne Georg Gleditsch
2010-09-09Also improve boot time on AMD for the DDR3 code path.Arne Georg Gleditsch
2010-09-09Apparently, it's not crucial to clear this at the exact moment we switchArne Georg Gleditsch
2010-09-05Trivial. Currently the max frequency is preset as 400Mhz. We need to set aZheng Bao
2010-09-04AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code.Kerry She
2010-08-31Get Byte65/66 for register manufacture ID code. RegMan1Present willZheng Bao
2010-08-30Multi-DIMMS on AMD ddr2 MCT channel B fixed.Kerry She
2010-08-30Multi-DIMMS on AMD ddr3 MCT channel B works.Kerry She
2010-08-30Trivial syntax correction of AMD mct_ddr3 dir.Kerry She
2010-08-27drop three unneeded config variables:Jens Rottmann
2010-08-26CONFIG_DEBUG_RAM_SETUP and CONFIG_DEBUG_SMBUS are only available if the board /Jens Rottmann
2010-08-24* Adds support for PC Engines Alix.2D(1)3 board to Coreboot.Aurelien Guillaume
2010-08-22documented workaround erratum 414, seeXavi Drudis Ferran
2010-08-22documented workaround erratum 372, seeXavi Drudis Ferran
2010-08-22Include RB_C3 in erratum 346Xavi Drudis Ferran
2010-08-22Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc.Xavi Drudis Ferran
2010-08-17Fix warnings (that become errors) in AMDHT for certain configurations (unused...Xavi Drudis Ferran
2010-08-05The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8].Zheng Bao
2010-07-26This patch converts the Geode GX2 boards to CAR.Nils Jacobs
2010-07-09Trivial -Werror fix.Cristi M
2010-07-08Fix all warnings in the tree Stefan Reinauer
2010-07-08get rid of even more fam10 and k8 warnings.Stefan Reinauer
2010-07-07fix some more warningsStefan Reinauer
2010-07-06Eliminate a couple of warnings from setup_resourcemap.cMyles Watson
2010-07-06Re-integrate "USE_OPTION_TABLE" code.Edwin Beasant
2010-07-06A bug fix:Myles Watson
2010-06-17Always enable parent resources before child resources.Myles Watson
2010-06-09Same conversion as with resources from static arrays to lists, exceptMyles Watson
2010-06-09Make k8 & fam10 northbridge.c code more similar.Myles Watson