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path: root/src/northbridge/intel/e7505
AgeCommit message (Expand)Author
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-09-14complier.h: add __always_inline and use it in code baseAaron Durbin
2018-06-20nb/intel/e7505: Leave ROM as un-cacheable in postcarKyösti Mälkki
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
2018-06-06intel/e7505: Remove ROMCC workaroundKyösti Mälkki
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-02intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-02intel/e7505: Move to RELOCATABLE_RAMSTAGEKyösti Mälkki
2018-06-02intel/e7505: Assume AGP slot disabledKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-06-02intel/e7505: Fix domain resourcesKyösti Mälkki
2018-05-29src/northbridge: Add and update license headersMartin Roth
2018-05-18nb/intel/e7505: Get rid of device_tElyes HAOUAS
2018-05-08{mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-05-27CBMEM: Clarify CBMEM_TOP_BACKUP function usageKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-09-20northbridge/intel/e7505/debug.c: Improve code formattingElyes HAOUAS
2016-09-20northbridge/intel/e7505: Improve code formattingElyes HAOUAS
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-09-10northbridge/intel/e7505: transition away from device_tAntonello Dettori
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-15cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc
2015-05-26acpi: Remove monolithic ACPIVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-04-29kbuild: automatically include northbridgesStefan Reinauer
2015-02-15x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert
2015-01-27CBMEM: Tag chipsets with LATE_CBMEM_INITKyösti Mälkki
2015-01-06northbridge: Drop print_ implementation from non-romcc boardsStefan Reinauer
2014-11-01northbridge/intel: Use DEVICE_NOOP macro over dummy symbolEdward O'Callaghan
2014-10-18e7505: Move to per-device ACPIVladimir Serbinenko
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
2014-07-08northbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-05-25northbridge/intel/e7505/raminit.c: Silence warn of unused funcEdward O'Callaghan
2014-01-13lib: Make log2() available in romstage on ARM, not just x86Alexandru Gagniuc
2013-09-11CBMEM: Unify get_top_of_ram()Kyösti Mälkki
2013-09-11CBMEM northbridges: Remove references to global high_tables_baseKyösti Mälkki
2013-07-11Set PCI bus operations at buildtime for ramstageKyösti Mälkki
2013-03-22x86: Unify arch/io.h and arch/romcc_io.hStefan Reinauer
2013-03-07Intel e7505: provide get_top_of_ramKyösti Mälkki
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
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