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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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2019-09-24
intel/cpu: Switch older models to TSC_MONOTONIC_TIMER
Kyösti Mälkki
2019-08-07
northbridge/intel: Rename ram_calc.c to memmap.c
Kyösti Mälkki
2019-08-03
intel/i945,gm45,pineview,x4x: Move stage cache support function
Kyösti Mälkki
2019-07-09
arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class
Kyösti Mälkki
2019-02-06
nb/intel/gm45: Use a common romstage
Arthur Heymans
2019-01-24
nb/intel/gm45: Put stage cache in TSEG
Arthur Heymans
2018-06-05
nb/intel/gm45: Switch to POSTCAR_STAGE
Arthur Heymans
2016-12-13
nb/intel/gm45: Use lapic udelay in SMM
Martin Roth
2016-11-09
nb/intel/gm45: Use LAPIC udelay instead of custom version
Arthur Heymans
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-08-31
northbridge/intel/gm45/Kconfig: Remove IOMMU symbol choice
Martin Roth
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-29
kbuild: automatically include northbridges
Stefan Reinauer
2014-10-16
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
Vladimir Serbinenko
2014-08-12
gm45: Ensure that brightness register in gma contains sane value.
Vladimir Serbinenko
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
Drop driver-y from GM45/ICH9/RK9
Stefan Reinauer
2012-11-27
intel/gm45: new northbridge
Patrick Georgi