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2020-04-05src/northbridge: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: Id2cb642baa764fd69543460ba869cd822ab5acad Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40056 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-03-31drivers/intel/gma: fold gma.asl into default_brightness_levels.aslMatt DeVillier
Including gma.asl at the platform level (vs the board level) means that even desktop boards need to include the default brightness levels, which makes no sense. To begin to clean this up, include gma.asl in default_brightness_levels.asl (as well as the handful of board-specific brightness files) and remove it from the various platforms. A follow-on commit will remove default_brightness_levels.asl from all boards which lack an internal display. Change-Id: I8063deeef4ab6d6ab34ed9b0be5b1d541d6e9b6b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39878 Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-25drivers/intel/gma/acpi: Add Kconfigs for backlight registersNico Huber
Instead of adding more versions of the `*pch.asl`, unify the existing ones and allow to override the register locations via Kconfig. The current defaults should work for Skylake and some newer platforms. TEST=Booted ThinkPad X201s, backlight control still works. Change-Id: I0b21d9a0288f0f8d6cb0a4776909bffdae7576f5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31503 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I89b10076e0f4a4b3acd59160fb7abe349b228321 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39611 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-11-04nb/intel: Use defined DEFAULT_RCBAElyes HAOUAS
Change-Id: I166dd3edb50699dfca7b60b83cfcae996ced90dc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36464 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-10-24acpi: Drop wrong _ADR objects for PCI host bridgesElyes HAOUAS
Found-by: ACPICA 20191018 Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36253 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-03-06Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki
The other DEFAULT_ entries are just immediate constants. Change-Id: Iebf4266810b8210cebabc814bba2776638d9b74d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-29sb/intel/i82801ix: Use the common ACPI pirq generatorArthur Heymans
For this to work the northbridge and lpc bridge device need acpi_name functions. TESTED on Thinkpad X200, a valid PIRQ routing in SSDT in /sys/firmware/acpi/tables/SSDT Change-Id: I62e520f53fa3f928a8e6f3b3cf33af2acdd53ed9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22980 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
On Broadwell, this reduces the number of 'remarks' in the IASL build from 222 to 3. Fixes these remarks: Object is not referenced (Name is within method [_CRS]) The ACPI compiler is trying to be helpful in letting us know that we're not using various fields in the MCRS ResourceTemplate when we define it inside of the _CRS method. Since we're not intending to use those objects in the method, it shouldn't be an issue, but the warning is annoying and can mask real issues. Moving the creation of the MCRS object to outside of the CRS method and referencing it from there solves this problem. This change was made for fsp_baytrail in commit 2eaa0d49 fsp_baytrail: Fix ACPI 'Object is not referenced' warnings Change-Id: I67a1faf963d1868f4133c7747a43a511cd28a44b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/11268 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
Consolidate some common (and mostly broken) code. Will try to fix things in separate commits. Maybe, igd.asl taken from gm45 (the non-PCH case) could also be used for i945 and sch. But this needs further investigation. Change-Id: Id3663bf588458e1e71920b96a3149f96947921e9 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/11702 Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Tested-by: build bot (Jenkins)
2015-05-28igd.asl rewriteVladimir Serbinenko
Old igd.asl had inconsistent addresses (between _DOD and actual device) and ghost devices. Any of those is enough to make brightness on windows fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous copying of the same thing 6 times per chipset. Leave only hooking up and chipset-specific part in chipset directory. Move NVS handling and ACPI-spec parts to a common file. Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7472 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-12-06northbridge/intel/*/acpi/igd.asl: Trivial indent style fixEdward O'Callaghan
Change-Id: I26e92645264c69bbc032b0e7e44d7d31de2dfa4d Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7665 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-08-22lenovo/x200: Move video ASL code to northbridge.Vladimir Serbinenko
Change-Id: I58760500252e78da947685c18201b6d446368333 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6729 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-11gm45: Declare brightness variables for ACPI use.Vladimir Serbinenko
Change-Id: I23a088919aaac16066e5dd8300a081a8095a93f0 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6589 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-17northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I8d4bf17fe9fd82499b1515a8e85dff9cba498350 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6294 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2012-11-27intel/gm45: new northbridgePatrick Georgi
The code supports DDR3 boards only. RAM init for DDR2 is sufficiently different that it requires separate code, and we have no boards to test that. Change-Id: I9076546faf8a2033c89eb95f5eec524439ab9fe1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1689 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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