Age | Commit message (Expand) | Author |
2020-02-24 | treewide: Capitalize 'CMOS' | Elyes HAOUAS |
2020-02-24 | src: capitalize 'RAM' | Elyes HAOUAS |
2020-02-17 | nb/intel/gm45: Fix typo in console message | Elyes HAOUAS |
2020-01-14 | intel/{gm45,x4x},i82801{ix|jx}: Move enable_smbus() call | Kyösti Mälkki |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2019-12-31 | src: Remove some romcc workarounds | Jacob Garber |
2019-12-31 | northbridge: Add missing include <device/pci_def.h> | Elyes HAOUAS |
2019-12-20 | src: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
2019-11-25 | Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol | Arthur Heymans |
2019-11-04 | nb/intel: Use defined DEFAULT_RCBA | Elyes HAOUAS |
2019-11-02 | nb/intel/gm45: Add VBOOT support | Arthur Heymans |
2019-11-01 | lib/cbmem_top: Add a common cbmem_top implementation | Arthur Heymans |
2019-10-28 | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans |
2019-10-28 | src: Remove unused '#include <cpu/cpu.h>' | Elyes HAOUAS |
2019-10-27 | src/[northbridge,security]: change "unsigned" to "unsigned int" | Martin Roth |
2019-10-24 | acpi: Drop wrong _ADR objects for PCI host bridges | Elyes HAOUAS |
2019-10-14 | nb/intel/gm45: Don't run graphics init on s3 resume | Arthur Heymans |
2019-10-14 | sb/intel/i82801ix: Add common code to set up LPC IO decode ranges | Arthur Heymans |
2019-09-28 | nb,sb/intel: Clean up some __BOOTBLOCK__ and __SIMPLE_DEVICE__ use | Kyösti Mälkki |
2019-09-24 | intel/cpu: Switch older models to TSC_MONOTONIC_TIMER | Kyösti Mälkki |
2019-08-28 | intel/smm/gen1: Use smm_subregion() | Kyösti Mälkki |
2019-08-26 | soc/intel: Use common romstage code | Kyösti Mälkki |
2019-08-26 | nb/intel/gm45: Call ddr3_calibrate_zq() only for DDR3 :) | Nico Huber |
2019-08-22 | arch/x86: Add <arch/romstage.h> | Kyösti Mälkki |
2019-08-18 | cpu/intel: Enter romstage without BIST | Kyösti Mälkki |
2019-08-15 | intel/smm/gen1: Rename header file | Kyösti Mälkki |
2019-08-15 | arch/x86: Add postcar_frame_common_mtrrs() | Kyösti Mälkki |
2019-08-15 | cpu/intel: Refactor platform_enter_postcar() | Kyösti Mälkki |
2019-08-15 | cpu/intel: Replace bsp_init_and_start_aps() | Kyösti Mälkki |
2019-08-13 | nb/intel/gm45: Don't create DMAR tables for disabled IGD | Arthur Heymans |
2019-08-13 | nb/intel/gm45/acpi.c: Don't read PCI config to check presence | Arthur Heymans |
2019-08-11 | arch/x86: Flip option NO_CAR_GLOBAL_MIGRATION | Kyösti Mälkki |
2019-08-11 | arch/x86: Enable POSTCAR_CONSOLE by default | Kyösti Mälkki |
2019-08-08 | lib/stage_cache: Refactor Kconfig options | Kyösti Mälkki |
2019-08-07 | northbridge/intel: Rename ram_calc.c to memmap.c | Kyösti Mälkki |
2019-08-03 | intel/i945,gm45,pineview,x4x: Fix stage cache location | Kyösti Mälkki |
2019-08-03 | intel/i945,gm45,pineview,x4x: Move stage cache support function | Kyösti Mälkki |
2019-07-09 | cpu/x86: Flip SMM_TSEG default | Kyösti Mälkki |
2019-07-09 | arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class | Kyösti Mälkki |
2019-07-04 | arch/x86: Adjust size of postcar stack | Kyösti Mälkki |
2019-06-08 | northbridge/gm45: document that raminit doesn't support mirrored ranks | Felix Held |
2019-05-29 | src/northbridge: Add missing 'include <types.h>' | Elyes HAOUAS |
2019-05-15 | src/northbridge: Remove unneeded include <arch/io.h> | Elyes HAOUAS |
2019-05-07 | {gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function | Elyes HAOUAS |
2019-04-16 | sb/intel/i82801ix: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB | Patrick Rudolph |
2019-04-11 | nb/intel/{gm45,i945,x4x}: Correct array bounds checks | Jacob Garber |
2019-04-06 | src: Use include <delay.h> when appropriate | Elyes HAOUAS |
2019-03-21 | {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() | Subrata Banik |