summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/haswell
AgeCommit message (Expand)Author
2020-08-04nb/intel/haswell: Use ASL 2.0 syntaxAngel Pons
2020-08-04nb/intel/haswell: Deduplicate PCIEXBAR decodingAngel Pons
2020-08-03nb/intel/haswell: Add Crystal Well PCI IDsIru Cai
2020-07-31nb/intel/haswell: Configure VCs on Egress PortAngel Pons
2020-07-30nb/intel/*: Fill in SMBIOS type 16 on SNB/HSWPatrick Rudolph
2020-07-28nb/intel/haswell: Enable DMI ASPMAngel Pons
2020-07-26src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth
2020-07-26nb/intel/haswell: Use macro for dimm->bus_widthElyes HAOUAS
2020-07-25nb/intel/haswell/hostbridge_regs.h: Clean up registersAngel Pons
2020-07-24nb/intel/haswell: Put host bridge registers into its own fileAngel Pons
2020-07-20sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons
2020-07-12nb/intel/haswell/romstage.c: Align pei_data initializersAngel Pons
2020-07-12haswell: Move some MRC settings to devicetreeAngel Pons
2020-07-12haswell: Automatically check if Intel GbE is to be enabledAngel Pons
2020-07-12haswell: Add function to retrieve SPD addressesAngel Pons
2020-07-12haswell: Automatically determine system typeAngel Pons
2020-07-12haswell: Introduce ENABLE_DDR_2X_REFRESH Kconfig optionAngel Pons
2020-07-12haswell: Factor out `max_ddr3_freq`Angel Pons
2020-07-12haswell: Compute disabled channel masks at runtimeAngel Pons
2020-07-12mb/asrock/b85m_pro4: Factor out common MRC settingsAngel Pons
2020-07-12haswell: Relocate `mainboard_romstage_entry` to northbridgeAngel Pons
2020-07-12haswell: Drop `struct romstage_params` typeAngel Pons
2020-07-12haswell: Make `copy_spd` a weak functionAngel Pons
2020-07-11nb/intel/haswell: Add `mb_late_romstage_setup` functionAngel Pons
2020-07-09haswell: Drop GPIO indirection layersAngel Pons
2020-07-09haswell: Turn RCBA configuration into a functionAngel Pons
2020-07-08haswell: relocate `romstage_common` to northbridgeAngel Pons
2020-07-08haswell: drop unused function parameterAngel Pons
2020-07-08nb/intel/haswell/acpi: Update to ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/haswell/acpi: Fix host bridge registersAngel Pons
2020-06-22nb/intel/haswell: Use 16-bit ops on PCI COMMANDAngel Pons
2020-06-09nb/intel/haswell: Use PCI bitwise opsAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-06-06src: Remove unused '#include <cpu/x86/smm.h>'Elyes HAOUAS
2020-06-03northbridge/intel/haswell: Mask lower 20 bits of TOLUD and TOLM in hostbridge...Furquan Shaikh
2020-06-03northbridge/intel/haswell: Update hostbridge.asl to ASL2.0Furquan Shaikh
2020-05-27intel/gma: Only enable bus mastering if we are going to use itNico Huber
2020-05-27intel/gma: Don't bluntly enable I/ONico Huber
2020-05-27drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber
2020-05-18src: Remove leading blank lines from SPDX headerElyes HAOUAS
2020-05-12device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel
2020-05-11treewide: Replace BSD-3-Clause and ISC headers with SPDX headersPatrick Georgi
2020-05-11treewide: split off license text, remove extra copyright noticesPatrick Georgi
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-09src/: Replace GPL boilerplate with SPDX headersPatrick Georgi
2020-05-09vboot: Clean up pre-RAM use of vboot_recovery_mode_enabled()Julius Werner
2020-05-08nb/intel/haswell/northbridge.c: Fix typoAngel Pons
2020-05-08northbridge/*/Kconfig: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS
2020-05-02acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh
2020-04-29nb/intel/haswell/pei_data.h: Add ULT system typeAngel Pons