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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
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mec1322
Some coreboot project code with my work
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path:
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src
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northbridge
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intel
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i5000
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raminit.c
Age
Commit message (
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Author
2016-11-23
northbridge/intel/i5000: Convert 'for(;;)' to 'die'
Elyes HAOUAS
2016-11-21
nb/intel: Fix some spelling mistakes in comments and strings
Martin Roth
2016-09-12
src/northbridge: Improve code formatting
Elyes HAOUAS
2016-09-10
northbridge/intel/i5000: transition away from device_t
Antonello Dettori
2016-08-31
northbridge/intel: Add required space before opening parenthesis '('
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-12-02
Replace hlt with halt()
Patrick Georgi
2014-05-19
fix printk types
Patrick Georgi
2013-12-23
Coding style: punctuation cleanup [1/2].
Idwer Vollering
2013-09-10
intel/i5000: remove explicit pcie config accesses
Kyösti Mälkki
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-02-11
Intel: Replace MSR 0xcd with MSR_FSB_FREQ
Patrick Georgi
2012-07-16
i5000: Fix resource allocation
Sven Schnelle
2012-07-09
i5000: reset system if raminit fails
Sven Schnelle
2012-02-10
Remove non-existent include
Sven Schnelle
2012-02-02
Add Intel i5000 Memory Controller Hub
Sven Schnelle