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coreboot
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Some coreboot project code with my work
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northbridge
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intel
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i5000
Age
Commit message (
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Author
2013-07-03
Move select MMCONF_SUPPORT under northbridge
Kyösti Mälkki
2013-05-21
intel/i5000: Remove unused copy of udelay.c
Nico Huber
2013-05-10
northbridge/intel/i5000/udelay.c: Remove unused header `console.h`
Paul Menzel
2013-03-22
x86: Unify arch/io.h and arch/romcc_io.h
Stefan Reinauer
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2013-02-28
Drop CONFIG_WRITE_HIGH_TABLES
Stefan Reinauer
2013-02-14
sconfig: rename lapic_cluster -> cpu_cluster
Stefan Reinauer
2013-02-14
sconfig: rename pci_domain -> domain
Stefan Reinauer
2013-02-11
Intel: Replace MSR 0xcd with MSR_FSB_FREQ
Patrick Georgi
2012-11-28
Remove assembly coded log2 function
Ronald G. Minnich
2012-11-27
Remove AMD special case for LAPIC based udelay()
Patrick Georgi
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-10-07
Remove chip.h files without config structure
Kyösti Mälkki
2012-08-22
Auto-declare chip_operations
Kyösti Mälkki
2012-08-08
Cleanup coreboot memory table includes
Kyösti Mälkki
2012-07-16
i5000: Fix resource allocation
Sven Schnelle
2012-07-09
i5000: reset system if raminit fails
Sven Schnelle
2012-07-06
i5000: Add PCI ids for all i5000 flavours
Sven Schnelle
2012-06-20
i5000: fix another typo
Sven Schnelle
2012-06-20
i5000: fix typos
Sven Schnelle
2012-06-18
i5000: enforce hard reset
Sven Schnelle
2012-05-02
Make Intel i5000 specific options only appear on i5000 systems
Stefan Reinauer
2012-02-10
Remove non-existent include
Sven Schnelle
2012-02-10
i5000: halt second BSP
Sven Schnelle
2012-02-02
Add Intel i5000 Memory Controller Hub
Sven Schnelle