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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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northbridge
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intel
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ironlake
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ironlake.h
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Author
2020-08-03
nb/intel/ironlake: Add Generic Non-Core PCI device definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Physical Layer registers
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Physical Layer device definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add QPI Link register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Add definition for QPI Link PCI device
Angel Pons
2020-08-03
nb/intel/ironlake: Add SAD DRAM register definitions
Angel Pons
2020-08-03
nb/intel/ironlake: Correct PCIEXBAR definition
Angel Pons
2020-08-03
nb/intel/ironlake: Add definition for SAD PCI device
Angel Pons
2020-08-03
nb/intel/ironlake: Put host bridge registers into its own file
Angel Pons
2020-07-01
nb/intel/ironlake/ironlake.h: Clean up
Angel Pons
2020-07-01
nb/intel/ironlake: Remove unused structs
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-05
src/northbridge: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-15
nb/intel/nehalem: Rename to ironlake
Angel Pons