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path: root/src/northbridge/intel/ironlake
AgeCommit message (Expand)Author
2020-12-14nb/intel/ironlake: Add comment about MCH scan chainsAngel Pons
2020-12-14nb/intel/ironlake: Remove unused constantAngel Pons
2020-12-07nb/intel/ironlake: Introduce memmap.hAngel Pons
2020-12-07nb/intel/ironlake: Drop casts from DEFAULT_{MCHBAR,DMIBAR}Angel Pons
2020-10-26src: Include <arch/io.h> when appropriateElyes HAOUAS
2020-10-24nb/intel/ironlake: Add more host bridge PCI IDsAngel Pons
2020-10-24nb/intel/ironlake: Generalise northbridge chip nameAngel Pons
2020-10-13nb/intel/ironlake: Put DMIBAR/EPBAR registers into separate filesAngel Pons
2020-10-10nb/intel/ironlake: Move register headers into a subfolderAngel Pons
2020-10-10nb/intel/ironlake: Clean up DMIBAR/EPBAR registersAngel Pons
2020-10-05nb/intel/ironlake: Drop unnecessary `smm_region_start` functionAngel Pons
2020-10-05nb/intel/ironlake/memmap.c: Clean up includesAngel Pons
2020-09-26ironlake: Fix compilation on x86_64Patrick Rudolph
2020-09-22nb/intel/ironlake: Use `MSAC` definitionAngel Pons
2020-09-22nb/intel/ironlake: Use DMIBAR/EPBAR macrosAngel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-09-21nb/intel/ironlake: Clean up cosmetics of early ME functionsAngel Pons
2020-09-21nb/intel/ironlake: Clean up `send_heci_uma_message` signatureAngel Pons
2020-09-21nb/intel/ironlake: Reduce the scope of `heci_uma_addr`Angel Pons
2020-09-17nb/intel/ironlake: Do not re-read ME UMA sizeAngel Pons
2020-09-17nb/intel/ironlake: Drop some unused function parametersAngel Pons
2020-09-17nb/intel/ironlake: Drop `heci_bar` field from raminitAngel Pons
2020-09-17nb/intel/ironlake: Drop invalid `DEFAULT_RCBABASE` macroAngel Pons
2020-09-15nb/intel/ironlake/raminit: Work around compiler bugPatrick Rudolph
2020-09-14nb/intel/ironlake: Reserve gap betwen TSEG and BGSMNico Huber
2020-09-14nb/intel/ironlake: Use an `index` variable for resourcesNico Huber
2020-09-08nb/intel/ironlake: Use an enum for `gpu_panel_port_select`Angel Pons
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-18src: Remove unused 'include <delay.h>'Elyes HAOUAS
2020-08-04nb/intel/ironlake/acpi.c: Factor out PCIEXBAR decodingAngel Pons
2020-08-04nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntaxAngel Pons
2020-08-03nb/intel/ironlake: Add Generic Non-Core register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add Generic Non-Core PCI device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer registersAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Physical Layer device definitionAngel Pons
2020-08-03nb/intel/ironlake: Add QPI Link register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Add definition for QPI Link PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Add SAD DRAM register definitionsAngel Pons
2020-08-03nb/intel/ironlake: Correct PCIEXBAR definitionAngel Pons
2020-08-03nb/intel/ironlake: Add definition for SAD PCI deviceAngel Pons
2020-08-03nb/intel/ironlake: Drop `D0F0_` prefix from register namesAngel Pons
2020-08-03nb/intel/ironlake: Rename memory map variablesAngel Pons
2020-08-03nb/intel/ironlake/raminit.c: Drop unused defineAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs: Drop D0F0_PMBASEAngel Pons
2020-08-03nb/intel/ironlake/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/ironlake: Put host bridge registers into its own fileAngel Pons
2020-07-25nb/intel/ironlake/raminit.c: initialize 'reply.command'Elyes HAOUAS
2020-07-24nb/intel/ironlake: Move southbridge code to ibexpeakAngel Pons
2020-07-14src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS
2020-07-09nb/intel/ironlake/raminit.c: Drop dead codeAngel Pons
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