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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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northbridge
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nehalem
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Makefile.inc
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Author
2019-08-07
northbridge/intel: Rename ram_calc.c to memmap.c
Kyösti Mälkki
2019-07-09
arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class
Kyösti Mälkki
2018-06-05
cpu/intel/model_2065x: Switch to POSTCAR_STAGE
Arthur Heymans
2018-05-18
nb/intel/nehalem: Use the common mrc cache driver
Arthur Heymans
2017-02-22
nehalem/Kconfig: Rename TRAINING_CACHE_SIZE to MRC_CACHE_SIZE
Arthur Heymans
2016-03-11
northbridge/intel: move mrccache.c of sandybridge + haswell to common
Alexander Couzens
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-07
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-07-13
x86: flatten hierarchy
Stefan Reinauer
2015-06-10
model_2065x: Use common i945-ivy TSEG SMM init.
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-29
kbuild: automatically include northbridges
Stefan Reinauer
2015-03-30
Update hex values to CBFS binary name types in Makefiles
Martin Roth
2014-11-20
Replace includes of build.h with version.h
Kyösti Mälkki
2014-10-16
ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
Vladimir Serbinenko
2014-06-18
intel/nehalem: Add get_top_top_ram() in ramstage
Kyösti Mälkki
2014-01-23
nehalem: Move mrc.cache to 0xfffe0000.
Vladimir Serbinenko
2013-11-25
Support for nehalem northbridge
Vladimir Serbinenko