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path: root/src/northbridge/intel/sandybridge/acpi
AgeCommit message (Expand)Author
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-02-21nb/intel/snb: Add PCI routing table for PEG root portsJames Ye
2020-02-12nb/intel/sandybridge/acpi: Fix MMCONF size computationPatrick Rudolph
2020-02-12nb/intel/sandybridge/acpi: Update PEG codePatrick Rudolph
2019-11-04nb/intel: Use defined DEFAULT_RCBAElyes HAOUAS
2019-10-24acpi: Drop wrong _ADR objects for PCI host bridgesElyes HAOUAS
2019-07-18nb/intel/sandybridge/acpi: Don't use defines for memory rangesPatrick Rudolph
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-06Remove DEFAULT_PCIEXBAR aliasKyösti Mälkki
2018-04-13nb/intel/sandybridge/peg: Add PEG driver stubPatrick Rudolph
2017-06-27nb/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2015-12-16northbridge/intel ACPI: Remove unused Local methodMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-23Intel: Move MCRS ResourceTemplate outside of _CRS methodMartin Roth
2015-10-12gma: Consolidate Intel IGD ACPI code some moreNico Huber
2015-05-28igd.asl rewriteVladimir Serbinenko
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-05-01intel: Correct MMIO related ACPI table settingsDave Frodin
2015-02-16acpi: Generate valid ACPI processor objectsTimothy Pearson
2014-12-06northbridge/intel/*/acpi/igd.asl: Trivial indent style fixEdward O'Callaghan
2014-11-23sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko
2014-08-21Merge LCD on sandy/ivyVladimir Serbinenko
2014-07-17northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-02-24intel/*/acpi: Increase range length of MCHBAR buffer to 32 kBPaul Menzel
2014-01-21sandybridge/igd: Add brightness register descriptionsVladimir Serbinenko
2012-07-26CTDP: Only do TDP down/nominal change from TNP0Duncan Laurie
2012-07-26ACPI: Add support for runtime config TDP downDuncan Laurie
2012-04-05Add support for Intel Sandybridge CPU (northbridge part)Stefan Reinauer