index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
sandybridge
/
pei_data.h
Age
Commit message (
Expand
)
Author
2020-03-18
nb/intel/sandybridge: Tidy up code and comments
Angel Pons
2019-05-13
nb/intel/sandybridge: Update pei_data comments
Patrick Rudolph
2018-11-01
src: Add missing include <stdint.h>
Elyes HAOUAS
2018-10-08
Move compiler.h to commonlib
Nico Huber
2017-07-13
Rename __attribute__((packed)) --> __packed
Stefan Reinauer
2014-05-06
northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment
Paul Menzel
2013-12-01
Add DDR refresh config to pei data structure.
Shawn Nematbakhsh
2013-06-28
Add support to enable/disable builtin GbE (again)
Stefan Reinauer
2013-06-27
Revert "Add support to enable/disable builtin GbE"
Kyösti Mälkki
2013-06-21
Add support to enable/disable builtin GbE
Stefan Reinauer
2013-03-09
Add Intel Panther Point USB3 initialization
Marc Jones
2012-11-14
Add PCIe init and NMode flag to PEI data structure
Stefan Reinauer
2012-11-14
Add ddr3lv_support flag to pei_data structure
Duncan Laurie
2012-11-14
pei_data.h: Fix comment
Marc Jones
2012-11-14
Provide MRC with a console printing callback function
Vadim Bendebury
2012-04-05
Add support for Intel Sandybridge CPU (northbridge part)
Stefan Reinauer