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path: root/src/northbridge/intel/sandybridge/raminit_common.c
AgeCommit message (Expand)Author
2020-04-19nb/intel/sandybridge: Refactor get_mem_min_tckAngel Pons
2020-04-14nb/intel/sandybridge/raminit: Add ECC supportPatrick Rudolph
2020-04-14nb/intel/sandybridge/raminit: Add ECC detection supportPatrick Rudolph
2020-03-26nb/intel/sandybridge: Use macros for JEDEC commandsAngel Pons
2020-03-26nb/intel/sandybridge: Correct TC_DTP handlingAngel Pons
2020-03-26nb/intel/sandybridge: Add and use TC_DTP definitionAngel Pons
2020-03-26nb/intel/sandybridge: Use IOSAV_BYTE_SERROR_C_ch macroAngel Pons
2020-03-26nb/intel/sandybridge: Update commentAngel Pons
2020-03-25nb/intel/sandybridge: Use SPDX headersAngel Pons
2020-03-23nb/intel/sandybridge: Use cached CPUIDAngel Pons
2020-03-23nb/intel/sandybridge: Do not define tables in a headerAngel Pons
2020-03-22nb/intel/sandybridge: Drop spurious register writeAngel Pons
2020-03-18nb/intel/sandybridge: Tidy up code and commentsAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-27nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE defineFelix Held
2020-01-16nb/intel/sandybridge: add macros for byte lane register offsetsFelix Held
2020-01-16nb/intel/sandybridge: refactor code around lane_base[]Felix Held
2020-01-15nb/intel/sandybridge: refactor lane_registers[]Felix Held
2020-01-15nb/intel/sandybridge: Repurpose HOST_BRIDGE macroAngel Pons
2020-01-14nb/intel/sandybridge: Drop 'or zero' instancesAngel Pons
2020-01-11nb/intel/sandybridge: Tidy up raminit codeAngel Pons
2020-01-10nb/intel/sandybridge: Add a bunch of MCHBAR definesAngel Pons
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
2020-01-01nb/intel/sandybridge: replace .val_4028 with .io_latencyFelix Held
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
2019-12-29nb/intel/sandybridge: simplify ME lock and memory enable bit writeFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for ME base and mask registersFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registersFelix Held
2019-12-20{nb,soc}: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-06-03nb/intel/sandybridge: Remove variable set but not usedElyes HAOUAS
2019-05-29intel/sandybridge: Make timC training more robust.Tobias Diedrich
2019-05-07{src,util}: Remove duplicated includesElyes HAOUAS
2019-04-09nb/intel/sandybridge: Set uninitialized run lengthJacob Garber
2019-03-19Fix 'unsigned int' to bare use of 'unsigned'Subrata Banik
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-04device/mmio.h: Add include file for MMIO opsKyösti Mälkki
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-08-20nb/intel/raminit: Remove unused headersPatrick Rudolph
2018-08-17sandybridge/raminit_common.c: fix printram statementIru Cai
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining placesFelix Held
2018-08-01sandybridge/raminit_common: use macro for execute command queue registerFelix Held
2018-08-01sandybridge/raminit_common: use FOR_ALL_CHANNELS macroFelix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2]Felix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2]Felix Held
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