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path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2017-01-06nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>Arthur Heymans
2016-12-16nb/intel/sandybridge/raminit: Separate Sandybridge and IvybridgePatrick Rudolph
2016-12-09intel/sandybridge: Use postcar_frame for MTRR setupKyösti Mälkki
2016-12-08nb/intel/sandybridge: Lock PAVPCDennis Wassenberg
2016-12-07MMCONF_SUPPORT: Drop redundant loggingKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Consolidate resource registrationKyösti Mälkki
2016-12-07MMCONF_SUPPORT: Flip default to enabledKyösti Mälkki
2016-12-07PCI ops: MMCONF_SUPPORT_DEFAULT is requiredKyösti Mälkki
2016-12-06CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki
2016-12-06intel PCI ops: Remove explicit PCI MMCONF accessKyösti Mälkki
2016-12-05nb/intel/sandybridge/raminit: Split raminit.cPatrick Rudolph
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-29nb/intel/nehalem,sandybridge: Hook up libgfxinitNico Huber
2016-11-29nb/intel/sandybridge/raminit: Support CL > 11Patrick Rudolph
2016-11-28nb/intel/sandybridge/raminit: Reset internal state on fallback attemptsPatrick Rudolph
2016-11-22nb/intel/sandybridge/raminit: Do not log inside busy-wait loopKyösti Mälkki
2016-11-22Remove explicit select MMCONF_SUPPORTKyösti Mälkki
2016-11-21nb/intel: Fix some spelling mistakes in comments and stringsMartin Roth
2016-11-20intel sandy/ivy: Improve DIMM replacement detectionKyösti Mälkki
2016-11-20intel sandy/ivy: Skip SPD loading on S3 resume pathKyösti Mälkki
2016-11-20intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAMKyösti Mälkki
2016-11-20intel sandy/ivy: Change CRC used to detect DIMM replacementKyösti Mälkki
2016-11-20nb/intel/sandybridge/raminit: Fix disable_channelPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Find CMD rate per channelPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Define registersPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Get rid of fallback attemptsPatrick Rudolph
2016-11-20nb/intel/sandybridge/raminit: Fix CAS Write LatencyPatrick Rudolph
2016-11-18intel/sandybridge: Use romstage_handoff for S3Kyösti Mälkki
2016-11-18intel/sandybridge post-car: Redo MTRR settings and stack selectionKyösti Mälkki
2016-11-11intel post-car: Separate files for setup_stack_and_mtrrs()Kyösti Mälkki
2016-11-11intel/sandybridge: Use common ACPI S3 recoveryKyösti Mälkki
2016-10-29nb/intel/sandybridge/gma: Always initialize DP buffer translationNico Huber
2016-10-11nb/intel/*/graphic_init: use sizeof instead of hardcoding edid sizeArthur Heymans
2016-10-11cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZENico Huber
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-10-04src/northbridge: Remove whitespace after sizeofElyes HAOUAS
2016-09-27northbridge/sandybridge/raminit_mrc.c: fix missing includeMatt DeVillier
2016-09-27nb/intel/*/gma.c: remove spaces at the fake vbt generationArthur Heymans
2016-09-04northbridge/intel/sandybridge: transition away from device_tAntonello Dettori
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-07intel/sandybridge: read correct leaf for cpu familyRyan Salsamendi
2016-06-23intel/sandybridge: Fix builds with System Agent blobKyösti Mälkki
2016-06-22intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-20nb/intel/sandybridge/raminit: Use supported CASPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
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