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path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2021-01-18northbridge/intel/sandybridge/bootblock.c: Remove repeated wordElyes HAOUAS
2021-01-15nb/intel/sandybridge: Clarify command timing calculationAngel Pons
2021-01-15nb/intel/sandybridge: Fix handling of clock timingAngel Pons
2021-01-15nb/intel/sandybridge: Remove wrong and nonsense conditionAngel Pons
2021-01-06nb/intel/sandybridge: Use consistent comment styleAngel Pons
2021-01-06nb/intel/sandybridge: Define and use `QCLK_PI` constantAngel Pons
2021-01-04nb/intel/sandybridge: Replace memset with initializerAngel Pons
2020-12-30drivers/intel/gma: Include gfx.asl by default for all platforms...Matt DeVillier
2020-12-25cpu/intel/model_206ax: Add more CPU steppingsAngel Pons
2020-12-25nb/intel/sandybridge: Move steppings to CPU headerAngel Pons
2020-12-25nb/intel/sandybridge: Rewrite constant valuesAngel Pons
2020-12-25nb/intel/sandybridge: Allow to ignore XMP voltageAngel Pons
2020-12-23nb/intel/sandybridge: Refactor ODT stretch table codeAngel Pons
2020-12-23nb/intel/sandybridge: Refactor `dram_find_spds_ddr3`Angel Pons
2020-12-23nb/intel/sandybridge: Always wait for IOSAV after starting itAngel Pons
2020-12-23nb/intel/sandybridge: Introduce `iosav_run_once_and_wait`Angel Pons
2020-12-23nb/intel/sandybridge: Remove unnecessary commentsAngel Pons
2020-12-23nb/intel/sandybridge: Print delays in decimalAngel Pons
2020-12-23nb/intel/sandybridge: Add comment to TC_RWP writeAngel Pons
2020-12-23nb/intel/sandybridge: Use proper names to refer to training stepsAngel Pons
2020-12-23nb/intel/sandybridge: Add comments about I/O and RT latencyAngel Pons
2020-12-23nb/intel/sandybridge: Rename I/O data timingsAngel Pons
2020-12-23nb/intel/sandybridge: Use bitfields for I/O data timingsAngel Pons
2020-12-23nb/intel/sandybridge: Compute data timings independentlyAngel Pons
2020-12-13nb/intel/sandybridge: Clean up program_timingsAngel Pons
2020-12-12nb/intel/sandybridge: Clean up stepping logicAngel Pons
2020-12-12nb/intel/sandybridge: Fix blunder in MR2 shadow codeAngel Pons
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-11-22nb/intel/sandybridge: Clean up COMPOFST1 logicAngel Pons
2020-11-22nb/intel/sandybridge: Correct get_COMP2 functionAngel Pons
2020-11-22nb/intel/sandybridge: Rename and refactor `discover_timC_write`Angel Pons
2020-11-22nb/intel/sandybridge: Only use write Vref if supportedAngel Pons
2020-11-22nb/intel/sandybridge: Refine power-down mode logicAngel Pons
2020-11-22nb/intel/sandybridge: Lower tPRPDEN to 1Angel Pons
2020-11-22nb/intel/sandybridge: Increase tRWDRDD with fast RAMAngel Pons
2020-11-22nb/intel/sandybridge: Rename and clean up `discover_edges_write`Angel Pons
2020-11-22nb/intel/sandybridge: Relocate PREA-ACT-RD sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Remove spurious writes to IOSAV BW maskAngel Pons
2020-11-22nb/intel/sandybridge: Drop `precharge` functionAngel Pons
2020-11-22nb/intel/sandybridge: Clarify register writeAngel Pons
2020-11-22nb/intel/sandybridge: Encapsulate JEDEC write levelingAngel Pons
2020-11-22nb/intel/sandybridge: Do not rewrite write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Make helper for write leveling sequenceAngel Pons
2020-11-22nb/intel/sandybridge: Run `read_mpr_training` before write trainingAngel Pons
2020-11-22nb/intel/sandybridge: Rename `read_training` functionAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRTRAININGMOD registerAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfield for GDCRCMDPICODINGAngel Pons
2020-11-22nb/intel/sandybridge: Move constants out of for-loopAngel Pons
2020-11-22nb/intel/sandybridge: Use bitfields to program MCMAIN timingsAngel Pons
2020-11-22nb/intel/sandybridge: Clean up TC_OTHP writesAngel Pons