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coreboot
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broadwell_refcode
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Some coreboot project code with my work
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sandybridge
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Author
2020-03-25
nb/intel/sandybridge: Factor out timing tables
Angel Pons
2020-03-25
nb/intel/sandybridge: Use SPDX headers
Angel Pons
2020-03-23
nb/intel/sandybridge: Use cached CPUID
Angel Pons
2020-03-23
nb/intel/sandybridge: Void MRC cache if CPUID differs
Angel Pons
2020-03-23
nb/intel/sandybridge: Store CPUID in ctrl struct
Angel Pons
2020-03-23
nb/intel/sandybridge: Add warning to saved structs
Angel Pons
2020-03-23
nb/intel/sandybridge: Remove unnecessary declaration
Angel Pons
2020-03-23
nb/intel/sandybridge: Do not define tables in a header
Angel Pons
2020-03-23
nb/intel/sandybridge: Reflow raminit tables
Angel Pons
2020-03-23
acpi: Change Processor ACPI Name (Intel only)
Christian Walter
2020-03-23
nb/intel/sandybridge: Remove oddball `- 1` in tRFC
Angel Pons
2020-03-22
nb/intel/sandybridge: Drop spurious register write
Angel Pons
2020-03-20
nb/intel/sandybridge: Deduplicate report_memory_config
Angel Pons
2020-03-20
nb/intel/sandybridge: Always write to PEGCTL
Angel Pons
2020-03-19
nb/intel/sandybridge: Use loops on DMI register groups
Angel Pons
2020-03-18
nb/intel/sandybridge: Tidy up code and comments
Angel Pons
2020-03-17
src (minus soc and mainboard): Remove copyright notices
Patrick Georgi
2020-03-07
src/nb: Use 'print("%s...", __func__)'
Elyes HAOUAS
2020-03-06
northbridge: Remove unused include <device/pci.h>
Elyes HAOUAS
2020-03-02
nb/intel/sandybridge: Fix VBOOT
Patrick Rudolph
2020-02-24
src: capitalize 'RAM'
Elyes HAOUAS
2020-02-21
nb/intel/snb: Add PCI routing table for PEG root ports
James Ye
2020-02-18
nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID
Jonathan A. Kollasch
2020-02-18
nb/intel/sandybridge: use list of northbridge device IDs
Jonathan A. Kollasch
2020-02-12
nb/intel/sandybridge/acpi: Fix MMCONF size computation
Patrick Rudolph
2020-02-12
nb/intel/sandybridge/acpi: Update PEG code
Patrick Rudolph
2020-02-01
nb/intel/sandybridge: improve indexed register helper macros
Felix Held
2020-01-27
nb/intel/sandybridge/raminit_common.h: add missing stdint.h include
Felix Held
2020-01-27
nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE define
Felix Held
2020-01-16
nb/intel/sandybridge: sort LANEBASE_* defines by their address
Felix Held
2020-01-16
nb/intel/sandybridge: add macros for byte lane register offsets
Felix Held
2020-01-16
nb/intel/sandybridge: refactor code around lane_base[]
Felix Held
2020-01-15
nb/intel/sandybridge: refactor lane_registers[]
Felix Held
2020-01-15
nb/intel/sandybridge: drop LyCx(r, x, y) macro
Felix Held
2020-01-15
nb/intel/sandybridge: Repurpose HOST_BRIDGE macro
Angel Pons
2020-01-14
intel/sandybridge,bd82x6x: Move enable_smbus() call
Kyösti Mälkki
2020-01-14
nb/intel/sandybridge: Drop 'or zero' instances
Angel Pons
2020-01-11
nb/intel/sandybridge: Tidy up raminit code
Angel Pons
2020-01-10
nb/intel/{i945,sandybridge}/bootblock.c: Fix typo
Elyes HAOUAS
2020-01-10
nb/intel/sandybridge: Add a bunch of MCHBAR defines
Angel Pons
2020-01-09
device,sb/intel: Move SMBus host controller prototypes
Kyösti Mälkki
2020-01-09
drivers/pc80/rtc: Separate {get|set}_option() prototypes
Kyösti Mälkki
2020-01-09
nb/intel/sandybridge: Make MCHBAR arithmetics consistent
Angel Pons
2020-01-06
drivers/pc80/rtc: Swap cmos_write32() parameter order
Kyösti Mälkki
2020-01-02
src: Remove unneeded 'include <arch/io.h>'
Elyes HAOUAS
2020-01-01
nb/intel/sandybridge: replace .val_4028 with .io_latency
Felix Held
2020-01-01
nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes
Angel Pons
2020-01-01
nb/intel/sandybridge: Use the MC_BIOS_DATA define
Angel Pons
2020-01-01
nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase
Angel Pons
2020-01-01
nb/intel/sandybridge: add and use memory thermal configuration registers
Felix Held
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