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path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2016-09-04northbridge/intel/sandybridge: transition away from device_tAntonello Dettori
2016-08-31northbridge/intel: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-07intel/sandybridge: read correct leaf for cpu familyRyan Salsamendi
2016-06-23intel/sandybridge: Fix builds with System Agent blobKyösti Mälkki
2016-06-22intel/model_206ax: Prepare for dynamic CONFIG_RAMTOPKyösti Mälkki
2016-06-20nb/intel/sandybridge/raminit: Use supported CASPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Do code cleanupPatrick Rudolph
2016-06-20nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devicesPatrick Rudolph
2016-06-17intel/model_206ax: Move platform specific definesKyösti Mälkki
2016-06-17Move definitions of HIGH_MEMORY_SAVEKyösti Mälkki
2016-06-12nb/intel/raminit (native): Read PCI mmio size from devicetreePatrick Rudolph
2016-06-12nb/intel: Factor out common MRC codePatrick Rudolph
2016-05-31Fix leaking CONFIG_VGA=yKyösti Mälkki
2016-05-04nb/intel/sandybridge/raminit: support calling dram_freq multiple timesPatrick Rudolph
2016-05-04nb/intel/sandybridge/raminit: add additional fallbacksPatrick Rudolph
2016-04-29nb/intel/sandybridge/raminit: fix regression "always use mrccache"Patrick Rudolph
2016-04-10nb/intel/sandybridge/raminit: always use mrccachePatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: die in toplevel functionPatrick Rudolph
2016-04-05nb/intel/sandybridge/raminit: prepare raminit for fallbackPatrick Rudolph
2016-03-30nb/intel/sandybridge/raminit: move ram training into seperate functionPatrick Rudolph
2016-03-29nb/intel/sandybridge/raminit: move dimm_info into ramctr_timingPatrick Rudolph
2016-03-11northbridge/intel: move mrccache.c of sandybridge + haswell to commonAlexander Couzens
2016-03-11northbridge/intel: move mrc_cache definition into a common headerAlexander Couzens
2016-03-11nortbridge/sandybridge/mrccache: parse the return code of flash->writeAlexander Couzens
2016-03-05sandybridge/gma_lvds: support both Sandy&Ivy on one boardIru Cai
2016-03-03nb/intel/sandybridge/raminit: Fill SMBIOS type17 infoPatrick Rudolph
2016-03-02nb/intel/sandybridge/romstage: Read fuse bits for max MEM ClkPatrick Rudolph
2016-03-02nb/intel/sandybridge/raminit: Make discover_timC_write non cyclicPatrick Rudolph
2016-02-28northbridge/intel: add missing #include guardsIru Cai
2016-02-26nb/intel/sandybridge/raminit: Adjust timB to prevent overflowPatrick Rudolph
2016-02-26tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"Denis 'GNUtoo' Carikli
2016-02-20nb/intel/sandybridge/raminit: Add XMP supportPatrick Rudolph
2016-02-19nb/intel/sandybridge/raminit: Improve loggingPatrick Rudolph
2016-02-18nb/intel/sandybridge: Start PEG link trainingPatrick Rudolph
2016-02-18southbridge/intel/bd82x6x: Use common gpio.cPatrick Rudolph
2016-02-16nb/intel/sandybridge/raminit: Add shift offsetPatrick Rudolph
2016-02-13sandybridge: Always include MRC if not using native RAM init.Vladimir Serbinenko
2016-02-12Make MRC vs native a config rather than making a separate chipset for it.Vladimir Serbinenko
2016-02-12Merge sandy/ivybridge romstage flow for MRC and non-MRC.Vladimir Serbinenko
2016-02-10Kconfig: Move defaults for CBFS_SIZEMartin Roth
2016-02-09sandybridge: Set all native gfx-related options in northbridge code.Vladimir Serbinenko
2016-02-09ivy: Add a possiblity for mainboard early init.Vladimir Serbinenko
2016-02-09Revert "northbridge/intel/peg: Disable unused ports"Nico Huber
2016-02-04northbridge/intel/peg: Disable unused portsPatrick Rudolph
2016-02-04nb/intel/sandybridge/raminit: Fix two dimms per channelPatrick Rudolph
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