summaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge
AgeCommit message (Expand)Author
2019-01-13{mb,nb,soc/fsp_baytrail}: Get rid of dump_mem()Elyes HAOUAS
2019-01-09cpu/intel: Use the common code to initialize the romstage timestampsArthur Heymans
2019-01-06usbdebug: Make the EHCI debug console work in the bootblockArthur Heymans
2019-01-06usbdebug: Refactor init callsKyösti Mälkki
2019-01-06device: Use pcidev_path_on_root()Kyösti Mälkki
2019-01-06device: Use pcidev_on_root()Kyösti Mälkki
2018-12-19northbridge: Remove useless include <device/pci_ids.h>Elyes HAOUAS
2018-12-13cpuid: Add helper function for cpuid(1) functionsSubrata Banik
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-11-16src: Remove unneeded include <lib.h>Elyes HAOUAS
2018-11-01src: Add missing include <stdint.h>Elyes HAOUAS
2018-10-23src: Remove unneeded whitespaceElyes HAOUAS
2018-10-08Move compiler.h to commonlibNico Huber
2018-09-28src/*: normalize Google copyright headersPatrick Georgi
2018-09-25northbridge: Use 'unsigned int' to bare use of 'unsigned'Elyes HAOUAS
2018-09-14nb/intel/sandybridge: Don't add SMBIOS Table 17 entries on resumeNico Huber
2018-08-22nb/intel/*/gma.c: Skip NGI when VGA decode is not enabledArthur Heymans
2018-08-21nb/intel/sandybridge/raminit: Move fill_smbios17 to ddr3.cPatrick Rudolph
2018-08-20nb/intel/raminit: Remove unused headersPatrick Rudolph
2018-08-20nb/intel/sandybridge/raminit: Fix DIMM type mappingPatrick Rudolph
2018-08-20nb/intel/sandybridge: Fill in DIMM serial numberPatrick Rudolph
2018-08-17sandybridge/raminit_common.c: fix printram statementIru Cai
2018-08-03sandybridge/raminit_mrc: remove reference to report_platform_info()Matt DeVillier
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR macros in remaining placesFelix Held
2018-08-01sandybridge/raminit_common: use macro for execute command queue registerFelix Held
2018-08-01sandybridge/raminit_common: use FOR_ALL_CHANNELS macroFelix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [2/2]Felix Held
2018-08-01sandybridge/raminit_common: use MCHBAR AND/OR/AND_OR macros [1/2]Felix Held
2018-08-01northbridge/sandybridge: add MCHBAR32 AND/OR/AND_OR access macrosFelix Held
2018-08-01nb/intel/sandybridge: Don't use PCI operations on the pci_domain deviceArthur Heymans
2018-07-30nb/intel/gm45: Use common code for SMM in TSEGArthur Heymans
2018-07-29sandybridge/raminit_common: use MCHBAR32 macro everywhereFelix Held
2018-07-29sandybridge/raminit: use MCHBAR32 macro everywhereFelix Held
2018-07-29sandybridge: add brackets to MCHBAR/EPBAR/DMIBAR access macrosFelix Held
2018-07-29nb/intel/sandybridge: Bump MRC_CACHE_VERSIONPatrick Rudolph
2018-07-28nb/intel/sandybridge/report_platform: Move remaining code to sb folderPatrick Rudolph
2018-07-28nb/intel/sandybridge: Move CPU report to cpu folderPatrick Rudolph
2018-07-28intel/sandybridge: Don't hardcode platform typePatrick Rudolph
2018-07-26nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus widthPatrick Rudolph
2018-07-26nb/intel/sandybridge/raminit: Fix PDWN_mode on desktopsPatrick Rudolph
2018-07-25drivers/tpm: Add TPM ramstage driver for devices without vboot.Philipp Deppenwiese
2018-07-25nb/intel/sandybridge/raminit: Fix non ASCII charPatrick Rudolph
2018-07-25nb/intel/sandybridge/raminit: Set REFIx9 according to specPatrick Rudolph
2018-07-02src/nb: Fix non-local header treated as localElyes HAOUAS
2018-06-30arch/x86/acpi: Add DMAR RMRR helper functionsMatt DeVillier
2018-06-21Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"Arthur Heymans
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-06-04src: Use "foo *bar" instead of "foo* bar"Elyes HAOUAS
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-13 01:36:31 +0000