Age | Commit message (Expand) | Author |
2020-03-02 | nb/intel/sandybridge: Fix VBOOT | Patrick Rudolph |
2020-02-24 | src: capitalize 'RAM' | Elyes HAOUAS |
2020-02-21 | nb/intel/snb: Add PCI routing table for PEG root ports | James Ye |
2020-02-18 | nb/intel/sandybridge: Add Xeon E3-1200 (v1) hostbridge PCI ID | Jonathan A. Kollasch |
2020-02-18 | nb/intel/sandybridge: use list of northbridge device IDs | Jonathan A. Kollasch |
2020-02-12 | nb/intel/sandybridge/acpi: Fix MMCONF size computation | Patrick Rudolph |
2020-02-12 | nb/intel/sandybridge/acpi: Update PEG code | Patrick Rudolph |
2020-02-01 | nb/intel/sandybridge: improve indexed register helper macros | Felix Held |
2020-01-27 | nb/intel/sandybridge/raminit_common.h: add missing stdint.h include | Felix Held |
2020-01-27 | nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE define | Felix Held |
2020-01-16 | nb/intel/sandybridge: sort LANEBASE_* defines by their address | Felix Held |
2020-01-16 | nb/intel/sandybridge: add macros for byte lane register offsets | Felix Held |
2020-01-16 | nb/intel/sandybridge: refactor code around lane_base[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: refactor lane_registers[] | Felix Held |
2020-01-15 | nb/intel/sandybridge: drop LyCx(r, x, y) macro | Felix Held |
2020-01-15 | nb/intel/sandybridge: Repurpose HOST_BRIDGE macro | Angel Pons |
2020-01-14 | intel/sandybridge,bd82x6x: Move enable_smbus() call | Kyösti Mälkki |
2020-01-14 | nb/intel/sandybridge: Drop 'or zero' instances | Angel Pons |
2020-01-11 | nb/intel/sandybridge: Tidy up raminit code | Angel Pons |
2020-01-10 | nb/intel/{i945,sandybridge}/bootblock.c: Fix typo | Elyes HAOUAS |
2020-01-10 | nb/intel/sandybridge: Add a bunch of MCHBAR defines | Angel Pons |
2020-01-09 | device,sb/intel: Move SMBus host controller prototypes | Kyösti Mälkki |
2020-01-09 | drivers/pc80/rtc: Separate {get|set}_option() prototypes | Kyösti Mälkki |
2020-01-09 | nb/intel/sandybridge: Make MCHBAR arithmetics consistent | Angel Pons |
2020-01-06 | drivers/pc80/rtc: Swap cmos_write32() parameter order | Kyösti Mälkki |
2020-01-02 | src: Remove unneeded 'include <arch/io.h>' | Elyes HAOUAS |
2020-01-01 | nb/intel/sandybridge: replace .val_4028 with .io_latency | Felix Held |
2020-01-01 | nb/intel/sandybridge/sandybridge.h: Do cosmetic fixes | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Use the MC_BIOS_DATA define | Angel Pons |
2020-01-01 | nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase | Angel Pons |
2020-01-01 | nb/intel/sandybridge: add and use memory thermal configuration registers | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use ME stolen memory and lock bit defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR | Felix Held |
2020-01-01 | nb/intel/sandybridge: add and use more MCHBAR register defines | Felix Held |
2020-01-01 | nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h | Felix Held |
2020-01-01 | nb/intel/sandybridge: use MESEG register names from datasheet | Felix Held |
2019-12-29 | nb/intel/sandybridge: simplify ME lock and memory enable bit write | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for ME base and mask registers | Felix Held |
2019-12-29 | nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers | Felix Held |
2019-12-27 | arch/x86: Remove <arch/cbfs.h> | Kyösti Mälkki |
2019-12-20 | {nb,soc}: Replace min/max() with MIN/MAX() | Elyes HAOUAS |
2019-12-19 | src/northbridge: Remove unused <stdlib.h> | Elyes HAOUAS |
2019-12-14 | bootblock: Provide some common prototypes | Kyösti Mälkki |
2019-12-12 | nb/{haswell,i945,sandybridge}: Drop outdated comment | Elyes HAOUAS |
2019-11-26 | nb/intel/sandybridge: Fix mrc.bin path | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree | Nico Huber |
2019-11-18 | nb/intel/sandybridge: Set up console in bootblock | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-18 | nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZE | Arthur Heymans |
2019-11-18 | sb/intel/bd82x6x: Make the pch_enable_lpc hook optional | Arthur Heymans |