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coreboot
2560p
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broadwell_refcode
e6230
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haswell-mrc
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Some coreboot project code with my work
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intel
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x4x
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raminit_ddr23.c
Age
Commit message (
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Author
2019-07-17
nb/intel/x4x: Die on invalid memory speeds
Jacob Garber
2019-06-21
nb/x4x: Rename {ddr,fsb}2{mhz,ps} as {ddr,fsb}_to_{mhz,ps}
Elyes HAOUAS
2019-06-05
nb/intel/x4x: Remove variable set but not used
Elyes HAOUAS
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-04
device/mmio.h: Add include file for MMIO ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2018-12-18
northbridge: Remove unneeded include <pc80/mc146818rtc.h>
Elyes HAOUAS
2018-11-19
src: Add required space after "switch"
Elyes HAOUAS
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-10-24
nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardware
Arthur Heymans
2018-08-04
x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [2/2]
Felix Held
2018-07-30
x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2]
Felix Held
2018-06-14
nb/intel/x4x: Fix a few things in set_enhanced_mode
Arthur Heymans
2018-06-14
nb/intel/x4x: Add the option for stacked channel map settings
Arthur Heymans
2018-05-24
nb/intel/x4x: Adapt post JEDEC for DDR3
Arthur Heymans
2018-05-24
nb/intel/x4x/raminit: Add DDR3 enhanced mode and power settings
Arthur Heymans
2018-05-24
nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings
Arthur Heymans
2018-05-24
nb/intel/x4x: Implement write leveling
Arthur Heymans
2018-05-24
nb/intel/x4x: Add DDR3 JEDEC init
Arthur Heymans
2018-05-14
nb/intel/x4x/raminit: DDR3 specific ODT
Arthur Heymans
2018-05-14
nb/intel/x4x: Add DDR3 rcomp
Arthur Heymans
2018-05-14
nb/intel/x4x/raminit: Support programming initials DD3 DLL setting
Arthur Heymans
2018-05-14
nb/intel/x4x/raminit: Support programming DDR3 timings
Arthur Heymans
2018-05-14
nb/intel/x4x/raminit: Make programming launch ddr3 specific
Arthur Heymans
2018-05-14
nb/intel/x4x/raminit: Make programming crossclock support DDR3
Arthur Heymans
2018-05-14
nb/intel/x4x: Rename a things that are not specific to DDR2
Arthur Heymans