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path: root/src/northbridge/intel/x4x
AgeCommit message (Expand)Author
2021-02-10nb/intel/x4x: Correct DDR3 turnaround tableAngel Pons
2021-02-07nb/intel/x4x: Constify write leveling arraysAngel Pons
2021-02-07nb/intel/x4x: Update write leveling commentAngel Pons
2021-02-07nb/intel/x4x: Constify DDR2 ODT tableAngel Pons
2021-02-07nb/intel/x4x: Clean up RCOMP cosmeticsAngel Pons
2021-02-07nb/intel/x4x: Drop unused first array indexAngel Pons
2021-02-07nb/intel/x4x: Unroll programming RCOMP data groupAngel Pons
2021-02-07nb/intel/x4x: Report if running in async modeAngel Pons
2021-02-07nb/intel/x4x: Factor out setting Tx DLL tap and PIAngel Pons
2021-02-07nb/intel/x4x: Correct ctrlset{2,3} register maskAngel Pons
2021-02-07nb/intel/x4x: Clean up cosmetics of raminit tablesAngel Pons
2021-02-07nb/intel/x4x: Drop commented-out statementAngel Pons
2021-02-06intel: Define `RCBA_LENGTH` in Kconfig and use itAngel Pons
2021-02-05intel: Turn `DEFAULT_RCBA` into a Kconfig symbolAngel Pons
2021-02-04nb/intel/x/bootblock.c Revert `include <arch/pci_io_cfg.h>`Angel Pons
2021-02-02treewide [Kconfig]: Remove useless commentElyes HAOUAS
2021-02-01nb/intel/x4x/bootblock.c: include <arch/pci_io_cfg.h>Elyes HAOUAS
2021-01-30nb/intel/x4x: Define and use MMCONF_BUS_NUMBERAngel Pons
2021-01-29device/Kconfig: Declare MMCONF symbols' type onceAngel Pons
2021-01-21cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZEElyes HAOUAS
2021-01-18northbridge/intel/x4x/dq_dqs.c: Remove repeated wordElyes HAOUAS
2021-01-18northbridge/intel/x4x/raminit_ddr23.c: Remove repeated wordElyes HAOUAS
2021-01-15nb/intel/x4x: Clean up raminit commentsAngel Pons
2021-01-15nb/intel/x4x: Reset DQS probe on all channelsAngel Pons
2020-12-30drivers/intel/gma: Include gfx.asl by default for all platforms...Matt DeVillier
2020-12-02cbfs: Enable CBFS mcache on most chipsetsJulius Werner
2020-10-14nb/intel/x4x: Place raminit definitions in raminit.hAngel Pons
2020-10-14nb/intel/x4x: Move register headers into a subfolderAngel Pons
2020-10-14nb/intel/x4x: Clean up DMIBAR/EPBAR definitionsAngel Pons
2020-10-02drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen
2020-09-25nb/intel/x4x/x4x.h: Clean up cosmeticsAngel Pons
2020-09-25nb/intel/x4x/iomap.h: Rename to memmap.hAngel Pons
2020-09-21src/northbridge: Drop unneeded empty linesElyes HAOUAS
2020-09-17nb/intel/x4x: Clean up TPM-related codeAngel Pons
2020-08-24mrc_cache: Add mrc_cache fetch functions to support non-x86 platformsShelley Chen
2020-08-17nb/intel/x4x/raminit_ddr23.c: Remove dead assignmentElyes HAOUAS
2020-08-05src: Use space after 'if', 'for'Elyes HAOUAS
2020-08-05src: Use space after switch, whileElyes HAOUAS
2020-08-04nb/intel/x4x: Define and use `HOST_BRIDGE` macroAngel Pons
2020-08-04nb/intel/x4x: Remove dead assignmentsAngel Pons
2020-08-04nb/intel/x4x: Refactor `decode_pcie_bar`Angel Pons
2020-08-04nb/intel/x4x: Change signature of `decode_pciebar`Angel Pons
2020-08-03nb/intel/x4x/hostbridge_regs.h: Clean up registersAngel Pons
2020-08-03nb/intel/x4x: Put host bridge registers into its own fileAngel Pons
2020-07-30nb/intel/x4x/rcven.c: Rename memory barrier functionAngel Pons
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
2020-07-08nb/intel/x4x/acpi: Use ASL 2.0 syntaxAngel Pons
2020-07-08nb/intel/x4x/acpi: Clean up commentsAngel Pons
2020-06-22device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki
2020-06-15x4x boards: Factor out MAX_CPUSAngel Pons
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