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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2020-01-09nb/intel/{i945,x4x,pineview}: Remove wrapper spd_read_byte()Kyösti Mälkki
2020-01-09drivers/pc80/rtc: Separate {get|set}_option() prototypesKyösti Mälkki
2020-01-09nb/intel/sandybridge: Make MCHBAR arithmetics consistentAngel Pons
2020-01-06drivers/pc80/rtc: Swap cmos_write32() parameter orderKyösti Mälkki
2020-01-02src: Remove unneeded 'include <arch/io.h>'Elyes HAOUAS
2020-01-01nb/intel/sandybridge: replace .val_4028 with .io_latencyFelix Held
2020-01-01nb/intel/sandybridge/sandybridge.h: Do cosmetic fixesAngel Pons
2020-01-01nb/intel/sandybridge: Use the MC_BIOS_DATA defineAngel Pons
2020-01-01nb/intel/sandybridge: Make `PM_PDWN_Config` uppercaseAngel Pons
2020-01-01nb/intel/sandybridge: add and use memory thermal configuration registersFelix Held
2020-01-01nb/intel/sandybridge: add and use ME stolen memory and lock bit definesFelix Held
2020-01-01nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BARFelix Held
2020-01-01nb/intel/sandybridge: add and use more MCHBAR register definesFelix Held
2020-01-01nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.hFelix Held
2020-01-01nb/intel/sandybridge: use MESEG register names from datasheetFelix Held
2019-12-31src: Remove some romcc workaroundsJacob Garber
2019-12-31northbridge: Add missing include <device/pci_def.h>Elyes HAOUAS
2019-12-29nb/intel/sandybridge: simplify ME lock and memory enable bit writeFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for ME base and mask registersFelix Held
2019-12-29nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registersFelix Held
2019-12-27arch/x86: Remove <arch/cbfs.h>Kyösti Mälkki
2019-12-26nb/haswell/minihd: correct subsystem IDMatt DeVillier
2019-12-20src: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-12-20{nb,soc}: Replace min/max() with MIN/MAX()Elyes HAOUAS
2019-12-19src/northbridge: Remove unused <stdlib.h>Elyes HAOUAS
2019-12-14bootblock: Provide some common prototypesKyösti Mälkki
2019-12-12nb/{haswell,i945,sandybridge}: Drop outdated commentElyes HAOUAS
2019-12-10mainboard/(i945,ich7): Remove commented RCBA32(0x341c) codeElyes HAOUAS
2019-12-06nb/i945: Fix typoElyes HAOUAS
2019-12-02src: Move 'static' to the beginning of declarationElyes HAOUAS
2019-12-01nb/intel/x4x: Factor out hiding PCI devs in pure fnArthur Heymans
2019-11-26nb/intel/sandybridge: Fix mrc.bin pathArthur Heymans
2019-11-25cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-25Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbolArthur Heymans
2019-11-21nb/sb/cpu: Drop Intel Rangeley supportArthur Heymans
2019-11-18nb/intel/sandybridge/mrc: Handle P2P disabling via devicetreeNico Huber
2019-11-18nb/intel/sandybridge: Set up console in bootblockArthur Heymans
2019-11-18nb/intel/sandybridge: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-18nb/intel/sandybridge: Configure DCACHE_BSP_STACK_SIZEArthur Heymans
2019-11-18sb/intel/bd82x6x: Make the pch_enable_lpc hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_rcba_config hook optionalArthur Heymans
2019-11-18nb/intel/sandybridge: Make the mainboard_early_init hook optionalArthur Heymans
2019-11-15nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Initialize console in bootblockArthur Heymans
2019-11-15nb/intel/i945: Move to C_ENVIRONMENT_BOOTBLOCKArthur Heymans
2019-11-15nb/intel/i945: Move boilerplate romstage to a common locationArthur Heymans
2019-11-15nb/intel/x4x: Move boilerplate romstage to a common locationArthur Heymans
2019-11-14mb/*/*(ich7/x4x): Use common early southbridge initArthur Heymans
2019-11-14sb/intel/i82801jx: Move early sb init to a common placeArthur Heymans
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