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path: root/src/northbridge/intel
AgeCommit message (Expand)Author
2017-12-20intel/gma: fix RPNFREQ_VAL bitmaskFelix Held
2017-12-19nb/intel/nehalem/gma: Drop stale pre-pocessor guardsNico Huber
2017-12-16nb/x4x/raminit: Rewrite SPD decode and timing selectionArthur Heymans
2017-12-12nb/intel/x4x/rcven.c: Fix programming coarse offsetArthur Heymans
2017-12-09intel/i440bx: Correct RAM init programmingKeith Hui
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2017-11-03nb/intel/gm45: Enable LAPIC monotonic timerNico Huber
2017-10-29nb/intel/i3100: Don't select UDELAY_IOArthur Heymans
2017-10-283rdparty/lib{hwbase,gfxinit}: Update to latest masterNico Huber
2017-10-28drivers/intel/gma: Put gma_gfxinit() into its own headerNico Huber
2017-10-22nb/intel/pineview: Port ACPI opregion to pineviewPatrick Rudolph
2017-10-22security/vboot: Move vboot2 to security kconfig sectionPhilipp Deppenwiese
2017-10-19nb/sandybridge: Add a kconfig option to ignore XMP max DIMMsVagiz Trakhanov
2017-10-16sandybridge/acpi: remove unnessary check of PCI IDsVagiz Trakhanov
2017-10-16nb/intel: Add Ivy Bridge Server (Xeon-E3v2) PCI IDsVagiz Trakhanov
2017-10-13nb/intel/*/gma: Port ACPI opregion to older platformsPatrick Rudolph
2017-10-12nb/intel/sandybridge/raminit: Fix setting scramble seed for CH1Arthur Heymans
2017-10-03nb/intel/gm45: Remove UMA alignment optimizationNico Huber
2017-10-03nb/intel/sandybridge: Refactor dram_dimm_mapping()Nico Huber
2017-09-27nb/intel/sandybridge/raminit: Improve readabilityPatrick Rudolph
2017-09-25nb/i945/raminit: Don't fall back to smbus read on failed SPD decodeArthur Heymans
2017-09-22nb/intel/x4x: Select LAPIC_MONOTONIC_TIMERArthur Heymans
2017-09-22nb/intel/i945: Add space after comma in log messagePaul Menzel
2017-09-20nb/i945/raminit: Use common ddr2 decode functionsArthur Heymans
2017-09-20nb/intel/i945/early_init.c: Replace numbers with macrosElyes HAOUAS
2017-09-14device: acpi_name() should take a const struct deviceAaron Durbin
2017-09-13nb/intel/i945/raminit.c: Replace numbers with macrosElyes HAOUAS
2017-09-13intel/i440bx: Implement EARLY_CBMEM_INIT supportKeith Hui
2017-09-10nb/intel/i945: Clear timeout bits after disabling watchdogNico Huber
2017-09-06nb/intel/i945/raminit.c: Refactor tRD selectionArthur Heymans
2017-09-05nb/intel/common: Write MRC cache at exit of BS_DEV_INITNico Huber
2017-09-02nb/intel/pineview: Enable dram remappingArthur Heymans
2017-09-01nb/intel/i440bx/debug.c: Bugfix and cleanupKeith Hui
2017-09-01intel/i440bx: Move LATE_CBMEM_INIT under mainboardKyösti Mälkki
2017-08-27nb/intel/pineview: Fix typo in DRAM timing computationArthur Heymans
2017-08-20nb/intel/x4x: Fix booting with FSB800 DDR667 combinationArthur Heymans
2017-08-20nb/intel/x4x/raminit: Rework receive enable calibrationArthur Heymans
2017-08-18nb/intel/i440bx: Compile debug.c only if CONFIG_DEBUG_RAM_SETUPKeith Hui
2017-08-14nb/intel/sandybridge/gma: Fix S3 resumePatrick Rudolph
2017-08-11nb/intel/x4x/gma.c: Probe VGA EDID on DVI-I portsArthur Heymans
2017-08-11drivers/intel/gma/opregion: migrate from nb/commonMatt DeVillier
2017-08-10nb/intel/sandybridge/raminit: Add Kconfig option for fusesPatrick Rudolph
2017-08-07nb/intel/*/gma.c: Use macros for GMBUS numbersArthur Heymans
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2017-07-30intel/sandybridge: Clean VGA BIOS ids up a littleNico Huber
2017-07-30intel/sandybridge: Gather MMCONF_BASE_ADDRESS defaultsNico Huber
2017-07-24nb/intel/i440bx: Add final newline to raminit.cMartin Roth
2017-07-23northbridge/intel/i440bx: Merge RAM init routinesKeith Hui
2017-07-22northbridge/intel/i440bx: Move NB macro to i440bx.hKeith Hui
2017-07-21nb/intel/x4x: Rework programming DQ and DQS DLL timingsArthur Heymans
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