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Some coreboot project code with my work
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intel
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Author
2016-12-01
romstage_handoff: remove code duplication
Aaron Durbin
2016-11-30
intel/fsp_rangeley: Fix regression on MMCONF_SUPPORT
Kyösti Mälkki
2016-11-29
nb/intel/nehalem,sandybridge: Hook up libgfxinit
Nico Huber
2016-11-29
nb/intel/i945/gma: Declare count variable outside 'for' loop
Paul Menzel
2016-11-29
nb/intel/sandybridge/raminit: Support CL > 11
Patrick Rudolph
2016-11-28
nb/gm45/gma.c: Compute BLC_PWM_CTL value from PWM frequency
Arthur Heymans
2016-11-28
nb/intel/x4x/raminit: Fix DIMM_IN_CHANNEL calculation
Nico Huber
2016-11-28
nb/intel/gm45: Fix panel-power-sequence clock divisor
Nico Huber
2016-11-28
nb/intel/sandybridge/raminit: Reset internal state on fallback attempts
Patrick Rudolph
2016-11-26
nb/intel/x4x: Fix and deflate `dimm_config` in raminit
Nico Huber
2016-11-24
nb/intel/i82810: Make sure DIMM size isn't negative
Martin Roth
2016-11-23
northbridge/intel/i5000: Convert 'for(;;)' to 'die'
Elyes HAOUAS
2016-11-22
spi: Clean up SPI flash driver interface
Furquan Shaikh
2016-11-22
nb/intel/sandybridge/raminit: Do not log inside busy-wait loop
Kyösti Mälkki
2016-11-22
Remove explicit select MMCONF_SUPPORT
Kyösti Mälkki
2016-11-22
intel FSP sandy/ivy: Move select MMCONF_SUPPORT
Kyösti Mälkki
2016-11-21
nb/intel: Fix some spelling mistakes in comments and strings
Martin Roth
2016-11-20
intel sandy/ivy: Improve DIMM replacement detection
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Skip SPD loading on S3 resume path
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM
Kyösti Mälkki
2016-11-20
intel sandy/ivy: Change CRC used to detect DIMM replacement
Kyösti Mälkki
2016-11-20
nb/intel/sandybridge/raminit: Fix disable_channel
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Find CMD rate per channel
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Define registers
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Get rid of fallback attempts
Patrick Rudolph
2016-11-20
nb/intel/sandybridge/raminit: Fix CAS Write Latency
Patrick Rudolph
2016-11-18
intel/sandybridge: Use romstage_handoff for S3
Kyösti Mälkki
2016-11-18
intel/sandybridge post-car: Redo MTRR settings and stack selection
Kyösti Mälkki
2016-11-15
northbridge/intel/i855: transition away from device_t
Antonello Dettori
2016-11-15
nb/gm45: Refactor IGD vram decoding
Arthur Heymans
2016-11-11
intel post-car: Separate files for setup_stack_and_mtrrs()
Kyösti Mälkki
2016-11-11
intel/sandybridge: Use common ACPI S3 recovery
Kyösti Mälkki
2016-11-09
nb/intel/i945/early_init.c: Add DDR2-667 detection for 945GC
Elyes HAOUAS
2016-11-09
Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/Kconfig
Arthur Heymans
2016-11-09
nb/intel/gm45: Use LAPIC udelay instead of custom version
Arthur Heymans
2016-11-08
nb/x4x/raminit.c: Improve crossclock table cosmetics
Arthur Heymans
2016-11-08
intel/e7501: Remove unused northbridge code
Kyösti Mälkki
2016-11-02
nb/intel/i945/early_init.c: Use "IS_ENABLED(CONFIG_ ....)"
Elyes HAOUAS
2016-11-02
nb/i945/gma.c: use an if else statement for use of native init
Arthur Heymans
2016-11-02
nb/i945/gma.c: Do not try to load vbios when selecting native init
Arthur Heymans
2016-10-29
nb/intel/sandybridge/gma: Always initialize DP buffer translation
Nico Huber
2016-10-29
nb/intel/i945/gma.c: Homogenize code for PCI IDs.
Elyes HAOUAS
2016-10-26
nb/x4x/gma.c: Remove writes to DP, FDI registers
Arthur Heymans
2016-10-26
nb/gm45/gma.c: Remove writes to DP, FDI registers
Arthur Heymans
2016-10-26
nb/intel/i945: Add PCI id for I945GC
Nico Huber
2016-10-25
nb/i945/gma.c: Set the MSAC register correctly
Arthur Heymans
2016-10-24
nb/i945/Kconfig: select the correct VGA_BIOS_ID for 945GC
Arthur Heymans
2016-10-19
nb/i945/gma.c: use IS_ENABLED instead of #if, #endif
Arthur Heymans
2016-10-19
nb/i945/raminit: Add fix for clock crossing for 800MHz FSB CPU
Arthur Heymans
2016-10-19
nb/i945/raminit: Add fix for 1067MHz FSB CPUs
Arthur Heymans
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